target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-cm520-79f.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/leds/common.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "MobiPromo CM520-79F";
  11         compatible = "mobipromo,cm520-79f";
  12
  13         aliases {
  14                 led-boot = &led_sys;
  15                 led-failsafe = &led_sys;
  16                 led-running = &led_sys;
  17                 led-upgrade = &led_sys;
  18         };
  19
  20         soc {
  21                 mdio@90000 {
  22                         status = "okay";
  23                         pinctrl-0 = <&mdio_pins>;
  24                         pinctrl-names = "default";
  25                         reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
  26                         reset-delay-us = <1000>;
  27                 };
  28
  29                 tcsr@1949000 {
  30                         compatible = "qcom,tcsr";
  31                         reg = <0x1949000 0x100>;
  32                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  33                 };
  34
  35                 tcsr@194b000 {
  36                         compatible = "qcom,tcsr";
  37                         reg = <0x194b000 0x100>;
  38                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  39                 };
  40
  41                 ess_tcsr@1953000 {
  42                         compatible = "qcom,tcsr";
  43                         reg = <0x1953000 0x1000>;
  44                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  45                 };
  46
  47                 tcsr@1957000 {
  48                         compatible = "qcom,tcsr";
  49                         reg = <0x1957000 0x100>;
  50                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  51                 };
  52
  53                 crypto@8e3a000 {
  54                         status = "okay";
  55                 };
  56         };
  57
  58         led_spi {
  59                 compatible = "spi-gpio";
  60                 #address-cells = <1>;
  61                 #size-cells = <0>;
  62
  63                 sck-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
  64                 mosi-gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
  65                 num-chipselects = <0>;
  66
  67                 led_gpio: led_gpio@0 {
  68                         compatible = "fairchild,74hc595";
  69                         reg = <0>;
  70                         gpio-controller;
  71                         #gpio-cells = <2>;
  72                         registers-number = <1>;
  73                         spi-max-frequency = <1000000>;
  74                 };
  75         };
  76
  77         leds {
  78                 compatible = "gpio-leds";
  79
  80                 usb {
  81                         function = LED_FUNCTION_USB;
  82                         color = <LED_COLOR_ID_BLUE>;
  83                         gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
  84                         linux,default-trigger = "usbport";
  85                         trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>;
  86                 };
  87
  88                 led_sys: can {
  89                         label = "blue:can";
  90                         gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
  91                 };
  92
  93                 wan {
  94                         function = LED_FUNCTION_WAN;
  95                         color = <LED_COLOR_ID_BLUE>;
  96                         gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
  97                 };
  98
  99                 lan1 {
 100                         label = "blue:lan1";
 101                         gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
 102                 };
 103
 104                 lan2 {
 105                         label = "blue:lan2";
 106                         gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
 107                 };
 108
 109                 wlan2g {
 110                         label = "blue:wlan2g";
 111                         gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
 112                         linux,default-trigger = "phy0tpt";
 113                 };
 114
 115                 wlan5g {
 116                         label = "blue:wlan5g";
 117                         gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
 118                         linux,default-trigger = "phy1tpt";
 119                 };
 120         };
 121
 122         keys {
 123                 compatible = "gpio-keys";
 124
 125                 reset {
 126                         label = "reset";
 127                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 128                         linux,code = <KEY_RESTART>;
 129                 };
 130         };
 131 };
 132
 133 &watchdog {
 134         status = "okay";
 135 };
 136
 137 &prng {
 138         status = "okay";
 139 };
 140
 141 &blsp_dma {
 142         status = "okay";
 143 };
 144
 145 &blsp1_uart1 {
 146         status = "okay";
 147 };
 148
 149 &blsp1_uart2 {
 150         status = "okay";
 151 };
 152
 153 &cryptobam {
 154         status = "okay";
 155 };
 156
 157 &nand {
 158         pinctrl-0 = <&nand_pins>;
 159         pinctrl-names = "default";
 160         status = "okay";
 161
 162         nand@0 {
 163                 partitions {
 164                         compatible = "fixed-partitions";
 165                         #address-cells = <1>;
 166                         #size-cells = <1>;
 167
 168                         partition@0 {
 169                                 label = "SBL1";
 170                                 reg = <0x0 0x100000>;
 171                                 read-only;
 172                         };
 173
 174                         partition@100000 {
 175                                 label = "MIBIB";
 176                                 reg = <0x100000 0x100000>;
 177                                 read-only;
 178                         };
 179
 180                         partition@200000 {
 181                                 label = "BOOTCONFIG";
 182                                 reg = <0x200000 0x100000>;
 183                         };
 184
 185                         partition@300000 {
 186                                 label = "QSEE";
 187                                 reg = <0x300000 0x100000>;
 188                                 read-only;
 189                         };
 190
 191                         partition@400000 {
 192                                 label = "QSEE_1";
 193                                 reg = <0x400000 0x100000>;
 194                                 read-only;
 195                         };
 196
 197                         partition@500000 {
 198                                 label = "CDT";
 199                                 reg = <0x500000 0x80000>;
 200                                 read-only;
 201                         };
 202
 203                         partition@580000 {
 204                                 label = "CDT_1";
 205                                 reg = <0x580000 0x80000>;
 206                                 read-only;
 207                         };
 208
 209                         partition@600000 {
 210                                 label = "BOOTCONFIG1";
 211                                 reg = <0x600000 0x80000>;
 212                         };
 213
 214                         partition@680000 {
 215                                 label = "APPSBLENV";
 216                                 reg = <0x680000 0x80000>;
 217                         };
 218
 219                         partition@700000 {
 220                                 label = "APPSBL";
 221                                 reg = <0x700000 0x200000>;
 222                                 read-only;
 223                         };
 224
 225                         partition@900000 {
 226                                 label = "APPSBL_1";
 227                                 reg = <0x900000 0x200000>;
 228                                 read-only;
 229                         };
 230
 231                         art: partition@b00000 {
 232                                 label = "ART";
 233                                 reg = <0xb00000 0x80000>;
 234                                 read-only;
 235
 236                                 nvmem-layout {
 237                                         compatible = "fixed-layout";
 238                                         #address-cells = <1>;
 239                                         #size-cells = <1>;
 240
 241                                         precal_art_1000: precal@1000 {
 242                                                 reg = <0x1000 0x2f20>;
 243                                         };
 244
 245                                         macaddr_art_1006: macaddr@1006 {
 246                                                 reg = <0x1006 0x6>;
 247                                         };
 248
 249                                         precal_art_5000: precal@5000 {
 250                                                 reg = <0x5000 0x2f20>;
 251                                         };
 252
 253                                         macaddr_art_5006: macaddr@5006 {
 254                                                 reg = <0x5006 0x6>;
 255                                         };
 256                                 };
 257                         };
 258
 259                         partition@b80000 {
 260                                 label = "ubi";
 261                                 reg = <0xb80000 0x7480000>;
 262                         };
 263                 };
 264         };
 265 };
 266
 267 &qpic_bam {
 268         status = "okay";
 269 };
 270
 271 &tlmm {
 272         mdio_pins: mdio_pinmux {
 273                 mux_1 {
 274                         pins = "gpio6";
 275                         function = "mdio";
 276                         bias-pull-up;
 277                 };
 278
 279                 mux_2 {
 280                         pins = "gpio7";
 281                         function = "mdc";
 282                         bias-pull-up;
 283                 };
 284         };
 285
 286         nand_pins: nand_pins {
 287                 pullups {
 288                         pins =  "gpio52", "gpio53", "gpio58",
 289                                 "gpio59";
 290                         function = "qpic";
 291                         bias-pull-up;
 292                 };
 293
 294                 pulldowns {
 295                         pins =  "gpio54", "gpio55", "gpio56",
 296                                 "gpio57", "gpio60", "gpio61",
 297                                 "gpio62", "gpio63", "gpio64",
 298                                 "gpio65", "gpio66", "gpio67",
 299                                 "gpio68", "gpio69";
 300                         function = "qpic";
 301                         bias-pull-down;
 302                 };
 303         };
 304 };
 305
 306 &usb3_ss_phy {
 307         status = "okay";
 308 };
 309
 310 &usb3_hs_phy {
 311         status = "okay";
 312 };
 313
 314 &usb3 {
 315         status = "okay";
 316 };
 317
 318 &usb3_dwc {
 319         #address-cells = <1>;
 320         #size-cells = <0>;
 321
 322         usb3_port1: port@1 {
 323                 reg = <1>;
 324                 #trigger-source-cells = <0>;
 325         };
 326
 327         usb3_port2: port@2 {
 328                 reg = <2>;
 329                 #trigger-source-cells = <0>;
 330         };
 331 };
 332
 333 &usb2_hs_phy {
 334         status = "okay";
 335 };
 336
 337 &usb2 {
 338         status = "okay";
 339
 340         usb@6000000 {
 341                 #address-cells = <1>;
 342                 #size-cells = <0>;
 343
 344                 usb2_port1: port@1 {
 345                         reg = <1>;
 346                         #trigger-source-cells = <0>;
 347                 };
 348         };
 349 };
 350
 351 &gmac {
 352         status = "okay";
 353
 354         nvmem-cells = <&macaddr_art_1006>;
 355         nvmem-cell-names = "mac-address";
 356 };
 357
 358 &switch {
 359         status = "okay";
 360 };
 361
 362 &swport3 {
 363         status = "okay";
 364
 365         label = "lan2";
 366 };
 367
 368 &swport4 {
 369         status = "okay";
 370
 371         label = "lan1";
 372 };
 373
 374 &swport5 {
 375         status = "okay";
 376
 377         nvmem-cells = <&macaddr_art_5006>;
 378         nvmem-cell-names = "mac-address";
 379 };
 380
 381 &wifi0 {
 382         status = "okay";
 383         nvmem-cell-names = "pre-calibration";
 384         nvmem-cells = <&precal_art_1000>;
 385         qcom,ath10k-calibration-variant = "CM520-79F";
 386 };
 387
 388 &wifi1 {
 389         status = "okay";
 390         nvmem-cell-names = "pre-calibration";
 391         nvmem-cells = <&precal_art_5000>;
 392         qcom,ath10k-calibration-variant = "CM520-79F";
 393 };