1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
10 model = "GL.iNet GL-B2200";
11 compatible = "glinet,gl-b2200", "qcom,ipq4019";
14 device_type = "memory";
15 reg = <0x80000000 0x10000000>;
19 bootargs-append = " root=/dev/mmcblk0p2 rw rootwait clk_ignore_unused";
36 compatible = "qcom,tcsr";
37 reg = <0x1949000 0x100>;
38 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
43 compatible = "qcom,tcsr";
44 reg = <0x194b000 0x100>;
45 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
50 compatible = "qcom,tcsr";
51 reg = <0x1953000 0x1000>;
52 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
56 compatible = "qcom,tcsr";
57 reg = <0x1957000 0x100>;
58 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
67 compatible = "gpio-keys";
71 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
72 linux,code = <KEY_WPS_BUTTON>;
73 linux,input-type = <1>;
78 gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
79 linux,code = <KEY_RESTART>;
80 linux,input-type = <1>;
85 compatible = "gpio-leds";
88 function = LED_FUNCTION_POWER;
89 color = <LED_COLOR_ID_BLUE>;
90 gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
94 label = "blue:internet";
95 gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
98 function = LED_FUNCTION_POWER;
99 color = <LED_COLOR_ID_WHITE>;
100 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
103 label = "white:internet";
104 gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
115 pinctrl-0 = <&sd_pins>;
116 pinctrl-names = "default";
117 cd-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
118 vqmmc-supply = <&vqmmc>;
130 pinctrl-0 = <&spi_0_pins>;
131 pinctrl-names = "default";
133 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
136 compatible = "jedec,spi-nor";
138 spi-max-frequency = <24000000>;
141 compatible = "fixed-partitions";
142 #address-cells = <1>;
153 reg = <0x40000 0x20000>;
159 reg = <0x60000 0x60000>;
165 reg = <0xc0000 0x10000>;
171 reg = <0xd0000 0x10000>;
177 reg = <0xe0000 0x10000>;
183 reg = <0xf0000 0x80000>;
189 reg = <0x170000 0x10000>;
193 compatible = "fixed-layout";
194 #address-cells = <1>;
197 precal_art_1000: precal@1000 {
198 reg = <0x1000 0x2f20>;
201 precal_art_5000: precal@5000 {
202 reg = <0x5000 0x2f20>;
205 precal_art_9000: precal@9000 {
206 reg = <0x9000 0x2f20>;
215 pinctrl-0 = <&spi_1_pins>;
216 pinctrl-names = "default";
220 compatible = "silabs,si3210";
222 spi-max-frequency = <24000000>;
227 pinctrl-0 = <&serial_pins>;
228 pinctrl-names = "default";
233 pinctrl-0 = <&serial_1_pins>;
234 pinctrl-names = "default";
239 serial_pins: serial_pinmux {
241 pins = "gpio16", "gpio17";
242 function = "blsp_uart0";
247 serial_1_pins: serial1_pinmux {
249 pins = "gpio8", "gpio9",
251 function = "blsp_uart1";
256 spi_0_pins: spi_0_pinmux {
258 function = "blsp_spi0";
259 pins = "gpio13", "gpio14", "gpio15";
266 pins = "gpio13", "gpio14", "gpio15";
267 drive-strength = <12>;
272 drive-strength = <2>;
278 spi_1_pins: spi_1_pinmux {
280 pins = "gpio44", "gpio46", "gpio47";
281 function = "blsp_spi1";
314 pins = "gpio23", "gpio24", "gpio25", "gpio26",
315 "gpio29", "gpio30", "gpio31", "gpio32";
316 drive-strength = <10>;
322 drive-strength = <16>;
328 drive-strength = <10>;
337 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
338 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
341 reg = <0x00000000 0 0 0 0>;
342 #address-cells = <3>;
348 /* Bootlog shows this is a 168c:0056 - QCA 9888v2 */
349 compatible = "qcom,ath10k";
350 reg = <0x00010000 0 0 0 0>;
351 nvmem-cell-names = "pre-calibration";
352 nvmem-cells = <&precal_art_9000>;
353 qcom,ath10k-calibration-variant = "GL-B2200";
354 ieee80211-freq-limit = <5450000 5900000>;
381 nvmem-cell-names = "pre-calibration";
382 nvmem-cells = <&precal_art_1000>;
383 qcom,ath10k-calibration-variant = "GL-B2200";
388 nvmem-cell-names = "pre-calibration";
389 nvmem-cells = <&precal_art_5000>;
390 qcom,ath10k-calibration-variant = "GL-B2200";
391 ieee80211-freq-limit = <5100000 5400000>;