ipq40xx: use existing labels for prng node
[openwrt/staging/blogic.git] / target / linux / ipq40xx / files-6.6 / arch / arm / boot / dts / qcom / qcom-ipq4019-mf282plus.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2023, Andreas Böhler <dev@aboehler.at>
4
5 #include "qcom-ipq4019.dtsi"
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10
11 / {
12 model = "ZTE MF282Plus";
13 compatible = "zte,mf282plus";
14
15 aliases {
16 led-boot = &led_internal;
17 led-failsafe = &led_internal;
18 led-running = &led_internal;
19 led-upgrade = &led_internal;
20 };
21
22 chosen {
23 /*
24 * bootargs forced by u-boot bootipq command:
25 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
26 */
27 bootargs-append = " root=/dev/ubiblock0_1";
28 };
29
30 gpio_export {
31 compatible = "gpio-export";
32 #size-cells = <0>;
33
34 modem {
35 gpio-export,name = "modem-reset";
36 gpio-export,output = <0>;
37 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
38 };
39 };
40
41 leds {
42 compatible = "gpio-leds";
43
44 led_internal: led-0 {
45 function = LED_FUNCTION_STATUS;
46 color = <LED_COLOR_ID_BLUE>;
47 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
48 label = "blue:internal_led";
49 default-state = "keep";
50 };
51
52 led-1 {
53 function = LED_FUNCTION_WLAN;
54 color = <LED_COLOR_ID_BLUE>;
55 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
56 linux,default-trigger = "phy0tpt";
57 };
58 };
59
60 keys {
61 compatible = "gpio-keys";
62
63 wifi {
64 label = "wifi";
65 linux,code = <KEY_RFKILL>;
66 gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
67 };
68
69 reset {
70 label = "reset";
71 linux,code = <KEY_RESTART>;
72 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
73 };
74
75 wps {
76 label = "wps";
77 linux,code = <KEY_WPS_BUTTON>;
78 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
79 };
80 };
81
82 soc {
83 mdio@90000 {
84 status = "okay";
85 pinctrl-0 = <&mdio_pins>;
86 pinctrl-names = "default";
87 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
88 reset-delay-us = <2000>;
89 };
90
91 tcsr@1949000 {
92 compatible = "qcom,tcsr";
93 reg = <0x1949000 0x100>;
94 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
95 };
96
97 tcsr@194b000 {
98 /* select hostmode */
99 compatible = "qcom,tcsr";
100 reg = <0x194b000 0x100>;
101 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
102 status = "okay";
103 };
104
105 ess_tcsr@1953000 {
106 compatible = "qcom,tcsr";
107 reg = <0x1953000 0x1000>;
108 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
109 };
110
111 tcsr@1957000 {
112 compatible = "qcom,tcsr";
113 reg = <0x1957000 0x100>;
114 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
115 };
116
117 crypto@8e3a000 {
118 status = "okay";
119 };
120 };
121 };
122
123 &watchdog {
124 status = "okay";
125 };
126
127 &prng {
128 status = "okay";
129 };
130
131 &blsp_dma {
132 status = "okay";
133 };
134
135 &blsp1_spi1 {
136 pinctrl-0 = <&spi_0_pins>;
137 pinctrl-names = "default";
138 status = "okay";
139 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
140
141 flash@0 {
142 /* u-boot is looking for "n25q128a11" property */
143 compatible = "jedec,spi-nor", "n25q128a11";
144 #address-cells = <1>;
145 #size-cells = <1>;
146 reg = <0>;
147 spi-max-frequency = <24000000>;
148
149 partitions {
150 compatible = "fixed-partitions";
151 #address-cells = <1>;
152 #size-cells = <1>;
153
154 partition@0 {
155 label = "0:SBL1";
156 reg = <0x0 0x40000>;
157 read-only;
158 };
159
160 partition@40000 {
161 label = "0:MIBIB";
162 reg = <0x40000 0x20000>;
163 read-only;
164 };
165
166 partition@60000 {
167 label = "0:QSEE";
168 reg = <0x60000 0x60000>;
169 read-only;
170 };
171
172 partition@c0000 {
173 label = "0:CDT";
174 reg = <0xc0000 0x10000>;
175 read-only;
176 };
177
178 partition@d0000 {
179 label = "0:DDRPARAMS";
180 reg = <0xd0000 0x10000>;
181 read-only;
182 };
183
184 partition@e0000 {
185 label = "0:APPSBLENV";
186 reg = <0xe0000 0x10000>;
187 read-only;
188 };
189
190 partition@f0000 {
191 label = "0:APPSBL";
192 reg = <0xf0000 0xc0000>;
193 read-only;
194 };
195
196 partition@1b0000 {
197 label = "0:reserved1";
198 reg = <0x1b0000 0x50000>;
199 read-only;
200 };
201 };
202 };
203 };
204
205 &blsp1_uart1 {
206 pinctrl-0 = <&serial_pins>;
207 pinctrl-names = "default";
208 status = "okay";
209 };
210
211 &cryptobam {
212 status = "okay";
213 };
214
215 &gmac {
216 status = "okay";
217 nvmem-cell-names = "mac-address";
218 nvmem-cells = <&macaddr_config_0 0>;
219 };
220
221 &nand {
222 pinctrl-0 = <&nand_pins>;
223 pinctrl-names = "default";
224 status = "okay";
225
226 nand@0 {
227 partitions {
228 compatible = "fixed-partitions";
229 #address-cells = <1>;
230 #size-cells = <1>;
231
232 partition@0 {
233 label = "fota-flag";
234 reg = <0x0 0xa0000>;
235 read-only;
236 };
237
238 partition@a0000 {
239 label = "ART";
240 reg = <0xa0000 0x80000>;
241 read-only;
242
243 nvmem-layout {
244 compatible = "fixed-layout";
245 #address-cells = <1>;
246 #size-cells = <1>;
247
248 precal_art_1000: precal@1000 {
249 reg = <0x1000 0x2f20>;
250 };
251
252 precal_art_5000: precal@5000 {
253 reg = <0x5000 0x2f20>;
254 };
255 };
256 };
257
258 partition@120000 {
259 label = "mac";
260 reg = <0x120000 0x80000>;
261 read-only;
262
263 nvmem-layout {
264 compatible = "fixed-layout";
265 #address-cells = <1>;
266 #size-cells = <1>;
267
268 macaddr_config_0: macaddr@0 {
269 compatible = "mac-base";
270 reg = <0x0 0x6>;
271 #nvmem-cell-cells = <1>;
272 };
273 };
274 };
275
276 partition@1a0000 {
277 label = "reserved2";
278 reg = <0x1a0000 0xc0000>;
279 read-only;
280 };
281
282 partition@260000 {
283 label = "cfg-param";
284 reg = <0x260000 0x400000>;
285 read-only;
286 };
287
288 partition@660000 {
289 label = "log";
290 reg = <0x660000 0x400000>;
291 };
292
293 partition@a60000 {
294 label = "oops";
295 reg = <0xa60000 0xa0000>;
296 };
297
298 partition@b00000 {
299 label = "reserved3";
300 reg = <0xb00000 0x500000>;
301 read-only;
302 };
303
304 partition@1000000 {
305 label = "web";
306 reg = <0x1000000 0x800000>;
307 };
308
309 partition@1800000 {
310 label = "rootfs";
311 reg = <0x1800000 0x1d00000>;
312 };
313
314 partition@3500000 {
315 label = "data";
316 reg = <0x3500000 0x1900000>;
317 };
318
319 partition@4e00000 {
320 label = "fota";
321 reg = <0x4e00000 0x2800000>;
322 };
323
324 partition@7600000 {
325 label = "extra-cfg";
326 reg = <0x7600000 0xa00000>;
327 };
328 };
329 };
330 };
331
332 &qpic_bam {
333 status = "okay";
334 };
335
336 &switch {
337 status = "okay";
338 };
339
340 &swport4 {
341 status = "okay";
342
343 label = "lan";
344 };
345
346 &tlmm {
347 i2c_0_pins: i2c_0_pinmux {
348 mux {
349 pins = "gpio20", "gpio21";
350 function = "blsp_i2c0";
351 bias-disable;
352 };
353 };
354
355 mdio_pins: mdio_pinmux {
356 mux_1 {
357 pins = "gpio6";
358 function = "mdio";
359 bias-pull-up;
360 };
361
362 mux_2 {
363 pins = "gpio7";
364 function = "mdc";
365 bias-pull-up;
366 };
367 };
368
369 nand_pins: nand_pins {
370 pullups {
371 pins = "gpio52", "gpio53", "gpio58",
372 "gpio59";
373 function = "qpic";
374 bias-pull-up;
375 };
376
377 pulldowns {
378 pins = "gpio54", "gpio55", "gpio56",
379 "gpio57", "gpio60",
380 "gpio62", "gpio63", "gpio64",
381 "gpio65", "gpio66", "gpio67",
382 "gpio69";
383 function = "qpic";
384 bias-pull-down;
385 };
386 };
387
388 serial_pins: serial_pinmux {
389 mux {
390 pins = "gpio16", "gpio17";
391 function = "blsp_uart0";
392 bias-disable;
393 };
394 };
395
396 spi_0_pins: spi_0_pinmux {
397 pinmux {
398 function = "blsp_spi0";
399 pins = "gpio13", "gpio14", "gpio15";
400 drive-strength = <12>;
401 bias-disable;
402 };
403
404 pinmux_cs {
405 function = "gpio";
406 pins = "gpio12";
407 drive-strength = <2>;
408 bias-disable;
409 output-high;
410 };
411 };
412 };
413
414 &usb2_hs_phy {
415 status = "okay";
416 };
417
418 &usb2 {
419 status = "okay";
420 };
421
422 &usb3_ss_phy {
423 status = "okay";
424 };
425
426 &usb3_hs_phy {
427 status = "okay";
428 };
429
430 &usb3 {
431 status = "okay";
432 };
433
434 /*
435 * The MD5 sum of the board file of the MF286D is identical to the board
436 * file in the OEM firmware
437 */
438 &wifi0 {
439 status = "okay";
440 nvmem-cell-names = "pre-calibration", "mac-address";
441 nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 1>;
442 qcom,ath10k-calibration-variant = "zte,mf286d";
443 };
444
445 /*
446 * The MD5 sum of the board file of the MF286D is identical to the board
447 * file in the OEM firmware
448 */
449 &wifi1 {
450 status = "okay";
451 nvmem-cell-names = "pre-calibration", "mac-address";
452 nvmem-cells = <&precal_art_5000>, <&macaddr_config_0 1>;
453 qcom,ath10k-calibration-variant = "zte,mf286d";
454 };