1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/leds/common.h>
11 bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
16 led-failsafe = &led_sys;
17 led-running = &led_sys;
18 led-upgrade = &led_sys;
28 pinctrl-0 = <&mdio_pins>;
29 pinctrl-names = "default";
33 compatible = "qcom,tcsr";
34 reg = <0x1949000 0x100>;
35 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
39 compatible = "qcom,tcsr";
40 reg = <0x194b000 0x100>;
41 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
45 compatible = "qcom,tcsr";
46 reg = <0x1953000 0x1000>;
47 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
51 compatible = "qcom,tcsr";
52 reg = <0x1957000 0x100>;
53 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
66 compatible = "gpio-leds";
69 gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
70 color = <LED_COLOR_ID_BLUE>;
71 function = LED_FUNCTION_POWER;
75 gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
76 linux,default-trigger = "phy0tpt";
77 color = <LED_COLOR_ID_BLUE>;
78 function = LED_FUNCTION_WLAN;
79 function-enumerator = <0>;
83 gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
84 linux,default-trigger = "phy1tpt";
85 color = <LED_COLOR_ID_BLUE>;
86 function = LED_FUNCTION_WLAN;
87 function-enumerator = <1>;
92 compatible = "gpio-keys";
96 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
97 linux,code = <KEY_RESTART>;
111 compatible = "jedec,spi-nor";
112 spi-max-frequency = <24000000>;
115 compatible = "fixed-partitions";
116 #address-cells = <1>;
127 reg = <0x40000 0x20000>;
133 reg = <0x60000 0x60000>;
139 reg = <0xc0000 0x10000>;
145 reg = <0xd0000 0x10000>;
151 reg = <0xe0000 0x10000>;
157 reg = <0xf0000 0x80000>;
163 reg = <0x170000 0x10000>;
167 compatible = "fixed-layout";
168 #address-cells = <1>;
171 precal_art_1000: precal@1000 {
172 reg = <0x1000 0x2f20>;
175 precal_art_5000: precal@5000 {
176 reg = <0x5000 0x2f20>;
189 compatible = "fixed-partitions";
190 #address-cells = <1>;
193 nand_rootfs: partition@0 {
195 /* reg defined in 64M/128M variant dts. */
202 pinctrl-0 = <&serial_0_pins>;
203 pinctrl-names = "default";
213 pinctrl-names = "default";
214 pinctrl-0 = <&pcie_pins>;
215 perst-gpio = <&tlmm 4 GPIO_ACTIVE_LOW>;
216 wake-gpio = <&tlmm 40 GPIO_ACTIVE_HIGH>;
218 /* Free slot for use */
220 reg = <0x00000000 0 0 0 0>;
221 #address-cells = <3>;
232 pinctrl-0 = <&sd_0_pins>;
233 pinctrl-names = "default";
234 vqmmc-supply = <&vqmmc>;
239 pcie_pins: pcie_pinmux {
248 mdio_pins: mdio_pinmux {
262 sd_0_pins: sd_0_pinmux {
264 pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio28";
266 drive-strength = <10>;
272 drive-strength = <16>;
276 serial_0_pins: serial0-pinmux {
278 pins = "gpio16", "gpio17";
279 function = "blsp_uart0";
286 qcom,single-led-1000;
292 qcom,single-led-1000;
298 qcom,single-led-1000;
304 qcom,single-led-1000;
310 qcom,single-led-1000;
377 nvmem-cell-names = "pre-calibration";
378 nvmem-cells = <&precal_art_1000>;
379 qcom,ath10k-calibration-variant = "P&W-R619AC";
384 nvmem-cell-names = "pre-calibration";
385 nvmem-cells = <&precal_art_5000>;
386 qcom,ath10k-calibration-variant = "P&W-R619AC";