target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wpj419.dts

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  * Copyright (c) 2019, Nguyen Dinh Phi <phi_nguyen@compex.com.sg>
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  *
  16  */
  17
  18 #include "qcom-ipq4019.dtsi"
  19 #include <dt-bindings/gpio/gpio.h>
  20 #include <dt-bindings/input/input.h>
  21 #include <dt-bindings/soc/qcom,tcsr.h>
  22
  23 / {
  24         model = "Compex WPJ419";
  25         compatible = "compex,wpj419", "qcom,ipq4019";
  26
  27         memory {
  28                 device_type = "memory";
  29                 reg = <0x80000000 0x10000000>;
  30         };
  31
  32         reserved-memory {
  33                 ranges;
  34                 rsvd1@87000000 {
  35                         /* Reserved for other subsystem */
  36                         reg = <0x87000000 0x500000>;
  37                         no-map;
  38                 };
  39                 wifi_dump@87500000 {
  40                         reg = <0x87500000 0x600000>;
  41                         no-map;
  42                 };
  43
  44                 rsvd2@87B00000 {
  45                         /* Reserved for other subsystem */
  46                         reg = <0x87B00000 0x500000>;
  47                         no-map;
  48                 };
  49         };
  50
  51         chosen {
  52                 bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
  53         };
  54
  55         soc {
  56                 spi_0: spi@78b5000 {
  57                         pinctrl-0 = <&spi_0_pins>;
  58                         pinctrl-names = "default";
  59                         status = "okay";
  60                         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 41 GPIO_ACTIVE_HIGH>;
  61                         num-cs = <2>;
  62
  63                         flash0@0 {
  64                                 reg = <0>;
  65                                 compatible = "jedec,spi-nor";
  66                                 spi-max-frequency = <24000000>;
  67                                 broken-flash-reset;
  68
  69                                 partitions {
  70                                         compatible = "fixed-partitions";
  71                                         #address-cells = <1>;
  72                                         #size-cells = <1>;
  73
  74                                         partition@0 {
  75                                                 label = "0:SBL1";
  76                                                 reg = <0x000000 0x040000>;
  77                                                 read-only;
  78                                         };
  79
  80                                         partition@40000 {
  81                                                 label = "0:MIBIB";
  82                                                 reg = <0x040000 0x020000>;
  83                                                 read-only;
  84                                         };
  85
  86                                         partition@60000 {
  87                                                 label = "0:QSEE";
  88                                                 reg = <0x060000 0x060000>;
  89                                                 read-only;
  90                                         };
  91
  92                                         partition@c0000 {
  93                                                 label = "0:CDT";
  94                                                 reg = <0x0c0000 0x010000>;
  95                                                 read-only;
  96                                         };
  97
  98                                         partition@d0000 {
  99                                                 label = "0:DDRPARAMS";
 100                                                 reg = <0x0d0000 0x010000>;
 101                                                 read-only;
 102                                         };
 103
 104                                         partition@e0000 {
 105                                                 label = "u-boot-env";
 106                                                 reg = <0x0e0000 0x010000>;
 107                                         };
 108
 109                                         partition@f0000 {
 110                                                 label = "u-boot";
 111                                                 reg = <0x0f0000 0x080000>;
 112                                                 read-only;
 113                                         };
 114
 115                                         partition@170000 {
 116                                                 label = "0:ART";
 117                                                 reg = <0x170000 0x010000>;
 118                                                 read-only;
 119
 120                                                 nvmem-layout {
 121                                                         compatible = "fixed-layout";
 122                                                         #address-cells = <1>;
 123                                                         #size-cells = <1>;
 124
 125                                                         precal_art_1000: precal@1000 {
 126                                                                 reg = <0x1000 0x2f20>;
 127                                                         };
 128
 129                                                         precal_art_5000: precal@5000 {
 130                                                                 reg = <0x5000 0x2f20>;
 131                                                         };
 132                                                 };
 133                                         };
 134                                 };
 135                         };
 136
 137                         nand@1 {
 138                                 reg = <1>;
 139                                 status = "okay";
 140                                 compatible = "spi-nand";
 141                                 spi-max-frequency = <24000000>;
 142
 143                                 partitions {
 144                                         compatible = "fixed-partitions";
 145                                         #address-cells = <1>;
 146                                         #size-cells = <1>;
 147
 148                                         /* The device has 128MB, but we can only address
 149                                          * 64MB because of the bootloader's default settings.
 150                                          * This is due to the old mt29f driver,
 151                                          * which detected the deivce with only 64MB
 152                                          */
 153                                         partition@0 {
 154                                                 label = "ubi";
 155                                                 reg = <0x0000000 0x4000000>;
 156                                         };
 157                                 };
 158                         };
 159                 };
 160
 161                 tcsr@194b000 {
 162                         /* select hostmode */
 163                         compatible = "qcom,tcsr";
 164                         reg = <0x194b000 0x100>;
 165                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
 166                         status = "okay";
 167                 };
 168
 169                 tcsr@1949000 {
 170                         compatible = "qcom,tcsr";
 171                         reg = <0x1949000 0x100>;
 172                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
 173                 };
 174
 175                 ess_tcsr@1953000 {
 176                         compatible = "qcom,tcsr";
 177                         reg = <0x1953000 0x1000>;
 178                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
 179                 };
 180
 181                 tcsr@1957000 {
 182                         compatible = "qcom,tcsr";
 183                         reg = <0x1957000 0x100>;
 184                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
 185                 };
 186         };
 187
 188         keys {
 189                 compatible = "gpio-keys";
 190
 191                 reset {
 192                         label = "reset";
 193                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 194                         linux,code = <KEY_RESTART>;
 195                 };
 196         };
 197 };
 198
 199 &tlmm {
 200         mdio_pins: mdio_pinmux {
 201                 mux_1 {
 202                         pins = "gpio6";
 203                         function = "mdio";
 204                         bias-pull-up;
 205                 };
 206
 207                 mux_2 {
 208                         pins = "gpio7";
 209                         function = "mdc";
 210                         bias-pull-up;
 211                 };
 212         };
 213
 214         serial_0_pins: serial_pinmux {
 215                 mux {
 216                         pins = "gpio16", "gpio17";
 217                         function = "blsp_uart0";
 218                         bias-disable;
 219                 };
 220         };
 221
 222         serial_1_pins: serial1_pinmux {
 223                 mux {
 224                         pins = "gpio8", "gpio9", "gpio10", "gpio11";
 225                         function = "blsp_uart1";
 226                         bias-disable;
 227                 };
 228         };
 229
 230         spi_0_pins: spi_0_pinmux {
 231                 pinmux {
 232                         function = "blsp_spi0";
 233                         pins = "gpio13", "gpio14", "gpio15";
 234                         bias-disable;
 235                 };
 236
 237                 pinmux_cs {
 238                         function = "gpio";
 239                         pins = "gpio12";
 240                         bias-disable;
 241                         output-high;
 242                 };
 243         };
 244
 245         i2c_0_pins: i2c_0_pinmux {
 246                 mux {
 247                         pins = "gpio20", "gpio21";
 248                         function = "blsp_i2c0";
 249                         bias-disable;
 250                 };
 251         };
 252
 253         nand_pins: nand_pins {
 254                 pullups {
 255                         pins = "gpio52", "gpio53", "gpio58", "gpio59";
 256                         function = "qpic";
 257                         bias-pull-up;
 258                 };
 259
 260                 pulldowns {
 261                         pins = "gpio54", "gpio55", "gpio56",
 262                         "gpio57", "gpio60", "gpio61",
 263                         "gpio62", "gpio63", "gpio64",
 264                         "gpio65", "gpio66", "gpio67",
 265                         "gpio68", "gpio69";
 266                         function = "qpic";
 267                         bias-pull-down;
 268                 };
 269         };
 270
 271         led_0_pins: led0_pinmux {
 272                 mux_1 {
 273                         pins = "gpio36";
 274                         function = "led0";
 275                         bias-pull-down;
 276                 };
 277                 mux_2 {
 278                         pins = "gpio40";
 279                         function = "led4";
 280                         bias-pull-down;
 281                 };
 282         };
 283 };
 284
 285 &blsp_dma {
 286         status = "okay";
 287 };
 288
 289 &blsp1_uart1 {
 290         pinctrl-0 = <&serial_0_pins>;
 291         pinctrl-names = "default";
 292         status = "okay";
 293 };
 294
 295 &blsp1_uart2 {
 296         pinctrl-0 = <&serial_1_pins>;
 297         pinctrl-names = "default";
 298         status = "okay";
 299 };
 300
 301 &blsp1_i2c3 {
 302         pinctrl-0 = <&i2c_0_pins>;
 303         pinctrl-names = "default";
 304         status = "okay";
 305 };
 306
 307 &watchdog {
 308         status = "okay";
 309 };
 310
 311 &crypto {
 312         status = "okay";
 313 };
 314
 315 &cryptobam {
 316         status = "okay";
 317 };
 318
 319 &usb3_ss_phy {
 320         status = "okay";
 321 };
 322
 323 &usb3_hs_phy {
 324         status = "okay";
 325 };
 326
 327 &usb3 {
 328         status = "okay";
 329 };
 330
 331 &usb2_hs_phy {
 332         status = "okay";
 333 };
 334
 335 &usb2 {
 336         status = "okay";
 337 };
 338
 339 &qpic_bam {
 340         status = "okay";
 341 };
 342
 343 &nand {
 344         pinctrl-0 = <&nand_pins>;
 345         pinctrl-names = "default";
 346         status = "okay";
 347 };
 348
 349 &pcie0 {
 350         status = "okay";
 351         perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
 352         wake-gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
 353 };
 354
 355 &mdio {
 356         status = "okay";
 357         pinctrl-0 = <&mdio_pins>;
 358         pinctrl-names = "default";
 359         reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
 360         reset-delay-us = <5000>;
 361 };
 362
 363 &wifi0 {
 364         status = "okay";
 365         nvmem-cell-names = "pre-calibration";
 366         nvmem-cells = <&precal_art_1000>;
 367 };
 368
 369 &wifi1 {
 370         status = "okay";
 371         nvmem-cell-names = "pre-calibration";
 372         nvmem-cells = <&precal_art_5000>;
 373 };