target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4028-wpj428.dts

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  * Copyright (c) 2017, Christian Mehlis <christian@m3hlis.de>
   3  * Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  *
  17  */
  18
  19 #include "qcom-ipq4019.dtsi"
  20 #include <dt-bindings/gpio/gpio.h>
  21 #include <dt-bindings/input/input.h>
  22 #include <dt-bindings/soc/qcom,tcsr.h>
  23
  24 / {
  25         model = "Compex WPJ428";
  26         compatible = "compex,wpj428";
  27
  28         chosen {
  29                 /*
  30                  * There's a chance that SPI reads fail even though the data itself is alright.
  31                  * The read result is cached and squashfs can't recover.
  32                  * Just panic when that happens and hope that next time it doesn't.
  33                  */
  34                 bootargs-append = " rootflags=errors=panic";
  35         };
  36
  37         soc {
  38                 tcsr@194b000 {
  39                         /* select hostmode */
  40                         compatible = "qcom,tcsr";
  41                         reg = <0x194b000 0x100>;
  42                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  43                         status = "okay";
  44                 };
  45
  46                 tcsr@1949000 {
  47                         compatible = "qcom,tcsr";
  48                         reg = <0x1949000 0x100>;
  49                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  50                 };
  51
  52                 ess_tcsr@1953000 {
  53                         compatible = "qcom,tcsr";
  54                         reg = <0x1953000 0x1000>;
  55                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  56                 };
  57
  58                 tcsr@1957000 {
  59                         compatible = "qcom,tcsr";
  60                         reg = <0x1957000 0x100>;
  61                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  62                 };
  63         };
  64
  65         keys {
  66                 compatible = "gpio-keys";
  67
  68                 reset {
  69                         label = "reset";
  70                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  71                         linux,code = <KEY_RESTART>;
  72                 };
  73         };
  74
  75         aliases {
  76                 led-boot = &status;
  77                 led-failsafe = &status;
  78                 led-upgrade = &status;
  79         };
  80
  81         leds {
  82                 compatible = "gpio-leds";
  83
  84                 status: rss4 {
  85                         label = "green:rss4";
  86                         gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
  87                 };
  88
  89                 rss3 {
  90                         label = "green:rss3";
  91                         gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
  92                 };
  93         };
  94
  95         beeper: beeper {
  96                 compatible = "gpio-beeper";
  97                 gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
  98         };
  99 };
 100
 101 &watchdog {
 102         status = "okay";
 103 };
 104
 105 &prng {
 106         status = "okay";
 107 };
 108
 109 &crypto {
 110         status = "okay";
 111 };
 112
 113 &tlmm {
 114         mdio_pins: mdio_pinmux {
 115                 mux_1 {
 116                         pins = "gpio53";
 117                         function = "mdio";
 118                         bias-pull-up;
 119                 };
 120
 121                 mux_2 {
 122                         pins = "gpio52";
 123                         function = "mdc";
 124                         bias-pull-up;
 125                 };
 126         };
 127
 128         serial_pins: serial_pinmux {
 129                 mux {
 130                         pins = "gpio60", "gpio61";
 131                         function = "blsp_uart0";
 132                         bias-disable;
 133                 };
 134         };
 135
 136         spi_0_pins: spi_0_pinmux {
 137                 pin {
 138                         function = "blsp_spi0";
 139                         pins = "gpio55", "gpio56", "gpio57";
 140                         drive-strength = <12>;
 141                         bias-disable;
 142                 };
 143                 pin_cs {
 144                         function = "gpio";
 145                         pins = "gpio54";
 146                         drive-strength = <2>;
 147                         bias-disable;
 148                         output-high;
 149                 };
 150         };
 151 };
 152
 153 &blsp_dma {
 154         status = "okay";
 155 };
 156
 157 &blsp1_spi1 {
 158         pinctrl-0 = <&spi_0_pins>;
 159         pinctrl-names = "default";
 160         status = "okay";
 161         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 162
 163         m25p80@0 {
 164                 compatible = "jedec,spi-nor";
 165                 reg = <0>;
 166                 spi-max-frequency = <24000000>;
 167
 168                 partitions {
 169                         compatible = "fixed-partitions";
 170                         #address-cells = <1>;
 171                         #size-cells = <1>;
 172
 173                         partition0@0 {
 174                                 label = "0:SBL1";
 175                                 reg = <0x00000000 0x00040000>;
 176                                 read-only;
 177                         };
 178                         partition1@40000 {
 179                                 label = "0:MIBIB";
 180                                 reg = <0x00040000 0x00020000>;
 181                                 read-only;
 182                         };
 183                         partition2@60000 {
 184                                 label = "0:QSEE";
 185                                 reg = <0x00060000 0x00060000>;
 186                                 read-only;
 187                         };
 188                         partition3@c0000 {
 189                                 label = "0:CDT";
 190                                 reg = <0x000c0000 0x00010000>;
 191                                 read-only;
 192                         };
 193                         partition4@d0000 {
 194                                 label = "0:DDRPARAMS";
 195                                 reg = <0x000d0000 0x00010000>;
 196                                 read-only;
 197                         };
 198                         partition5@e0000 {
 199                                 label = "0:APPSBLENV"; /* uboot env*/
 200                                 reg = <0x000e0000 0x00010000>;
 201                                 read-only;
 202                         };
 203                         partition5@f0000 {
 204                                 label = "0:APPSBL"; /* uboot */
 205                                 reg = <0x000f0000 0x00080000>;
 206                                 read-only;
 207                         };
 208                         partition5@170000 {
 209                                 label = "0:ART";
 210                                 reg = <0x00170000 0x00010000>;
 211                                 read-only;
 212
 213                                 nvmem-layout {
 214                                         compatible = "fixed-layout";
 215                                         #address-cells = <1>;
 216                                         #size-cells = <1>;
 217
 218                                         macaddr_art_e010: mac-address@e010 {
 219                                                 reg = <0xe010 0x6>;
 220                                         };
 221
 222                                         macaddr_art_e018: mac-address@e018 {
 223                                                 reg = <0xe018 0x6>;
 224                                         };
 225
 226                                         precal_art_1000: precal@1000 {
 227                                                 reg = <0x1000 0x2f20>;
 228                                         };
 229
 230                                         precal_art_5000: precal@5000 {
 231                                                 reg = <0x5000 0x2f20>;
 232                                         };
 233                                 };
 234                         };
 235                         partition6@180000 {
 236                                 compatible = "denx,fit";
 237                                 label = "firmware";
 238                                 reg = <0x00180000 0x01e80000>;
 239                         };
 240                 };
 241         };
 242 };
 243
 244 &blsp1_uart1 {
 245         pinctrl-0 = <&serial_pins>;
 246         pinctrl-names = "default";
 247         status = "okay";
 248 };
 249
 250 &cryptobam {
 251         status = "okay";
 252 };
 253
 254 &mdio {
 255         status = "okay";
 256         pinctrl-0 = <&mdio_pins>;
 257         pinctrl-names = "default";
 258         reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
 259         reset-delay-us = <2000>;
 260 };
 261
 262 &gmac {
 263         status = "okay";
 264 };
 265
 266 &switch {
 267         status = "okay";
 268 };
 269
 270 &swport4 {
 271         status = "okay";
 272         label = "lan1";
 273
 274         nvmem-cells = <&macaddr_art_e018>;
 275         nvmem-cell-names = "mac-address";
 276 };
 277
 278 &swport5 {
 279         status = "okay";
 280         label = "lan2";
 281
 282         nvmem-cells = <&macaddr_art_e010>;
 283         nvmem-cell-names = "mac-address";
 284 };
 285
 286 &usb3 {
 287         status = "okay";
 288 };
 289
 290 &usb3_ss_phy {
 291         status = "okay";
 292 };
 293
 294 &usb3_hs_phy {
 295         status = "okay";
 296 };
 297
 298 &usb2 {
 299         status = "okay";
 300 };
 301
 302 &usb2_hs_phy {
 303         status = "okay";
 304 };
 305
 306 &wifi0 {
 307         status = "okay";
 308         nvmem-cell-names = "pre-calibration";
 309         nvmem-cells = <&precal_art_1000>;
 310 };
 311
 312 &wifi1 {
 313         status = "okay";
 314         nvmem-cell-names = "pre-calibration";
 315         nvmem-cells = <&precal_art_5000>;
 316 };