1 From 5b08c1d567ee8e6af94696b3e549997cbdb2bb80 Mon Sep 17 00:00:00 2001
2 From: Jaiganesh Narayanan <njaigane@codeaurora.org>
3 Date: Thu, 1 Sep 2016 10:40:38 +0530
4 Subject: [PATCH] pinctrl: qcom: ipq4019: add open drain support
6 Signed-off-by: Jaiganesh Narayanan <njaigane@codeaurora.org>
7 [ Brian: adapted from from the Chromium OS kernel used on IPQ4019-based
9 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
11 https://lore.kernel.org/linux-gpio/20200703080646.23233-1-computersforpeace@gmail.com/
13 drivers/pinctrl/qcom/pinctrl-ipq4019.c | 1 +
14 drivers/pinctrl/qcom/pinctrl-msm.c | 13 +++++++++++++
15 drivers/pinctrl/qcom/pinctrl-msm.h | 2 ++
16 3 files changed, 16 insertions(+)
18 --- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
19 +++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
20 @@ -254,6 +254,7 @@ DECLARE_QCA_GPIO_PINS(99);
28 --- a/drivers/pinctrl/qcom/pinctrl-msm.c
29 +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
30 @@ -225,6 +225,10 @@ static int msm_config_reg(struct msm_pin
34 + case PIN_CONFIG_DRIVE_OPEN_DRAIN:
38 case PIN_CONFIG_DRIVE_STRENGTH:
41 @@ -302,6 +306,12 @@ static int msm_config_group_get(struct p
45 + case PIN_CONFIG_DRIVE_OPEN_DRAIN:
46 + /* Pin is not open-drain */
51 case PIN_CONFIG_DRIVE_STRENGTH:
52 arg = msm_regval_to_drive(arg);
54 @@ -374,6 +384,9 @@ static int msm_config_group_set(struct p
58 + case PIN_CONFIG_DRIVE_OPEN_DRAIN:
61 case PIN_CONFIG_DRIVE_STRENGTH:
62 /* Check for invalid values */
63 if (arg > 16 || arg < 2 || (arg % 2) != 0)
64 --- a/drivers/pinctrl/qcom/pinctrl-msm.h
65 +++ b/drivers/pinctrl/qcom/pinctrl-msm.h
66 @@ -38,6 +38,7 @@ struct msm_function {
67 * @mux_bit: Offset in @ctl_reg for the pinmux function selection.
68 * @pull_bit: Offset in @ctl_reg for the bias configuration.
69 * @drv_bit: Offset in @ctl_reg for the drive strength configuration.
70 + * @od_bit: Offset in @ctl_reg for controlling open drain.
71 * @oe_bit: Offset in @ctl_reg for controlling output enable.
72 * @in_bit: Offset in @io_reg for the input bit value.
73 * @out_bit: Offset in @io_reg for the output bit value.
74 @@ -75,6 +76,7 @@ struct msm_pingroup {