1 From 28edd829133766eb3cefaf2e49d3ee701968061b Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Tue, 9 May 2023 01:57:17 +0200
4 Subject: [PATCH] mmc: sdhci-msm: comment unused sdhci_msm_set_clock
6 comment unused sdhci_msm_set_clock and __sdhci_msm_set_clock as due to some
7 current problem, we are forced to use sdhci_set_clock.
9 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
11 drivers/mmc/host/sdhci-msm.c | 86 ++++++++++++++++++------------------
12 1 file changed, 43 insertions(+), 43 deletions(-)
14 --- a/drivers/mmc/host/sdhci-msm.c
15 +++ b/drivers/mmc/host/sdhci-msm.c
16 @@ -1751,49 +1751,49 @@ static unsigned int sdhci_msm_get_min_cl
17 return SDHCI_MSM_MIN_CLOCK;
21 - * __sdhci_msm_set_clock - sdhci_msm clock control.
24 - * MSM controller does not use internal divider and
25 - * instead directly control the GCC clock as per
26 - * HW recommendation.
28 -static void __sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)
32 - sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
38 - * MSM controller do not use clock divider.
39 - * Thus read SDHCI_CLOCK_CONTROL and only enable
40 - * clock with no divider value programmed.
42 - clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
43 - sdhci_enable_clk(host, clk);
46 -/* sdhci_msm_set_clock - Called with (host->lock) spinlock held. */
47 -static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)
49 - struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
50 - struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
53 - host->mmc->actual_clock = msm_host->clk_rate = 0;
57 - sdhci_msm_hc_select_mode(host);
59 - msm_set_clock_rate_for_bus_mode(host, clock);
61 - __sdhci_msm_set_clock(host, clock);
64 +// * __sdhci_msm_set_clock - sdhci_msm clock control.
67 +// * MSM controller does not use internal divider and
68 +// * instead directly control the GCC clock as per
69 +// * HW recommendation.
71 +// static void __sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)
75 +// sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
81 +// * MSM controller do not use clock divider.
82 +// * Thus read SDHCI_CLOCK_CONTROL and only enable
83 +// * clock with no divider value programmed.
85 +// clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
86 +// sdhci_enable_clk(host, clk);
89 +// /* sdhci_msm_set_clock - Called with (host->lock) spinlock held. */
90 +// static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock)
92 +// struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
93 +// struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
96 +// host->mmc->actual_clock = msm_host->clk_rate = 0;
100 +// sdhci_msm_hc_select_mode(host);
102 +// msm_set_clock_rate_for_bus_mode(host, clock);
104 +// __sdhci_msm_set_clock(host, clock);
107 /*****************************************************************************\