1 From 19c507c3fe4a6fc60317dcae2c55de452aecb7d5 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robert.marko@sartura.hr>
3 Date: Mon, 1 Nov 2021 18:15:04 +0100
4 Subject: [PATCH] arm: dts: ipq4019: add switch node
6 Since the built-in IPQ40xx switch now has a driver, add the required node
9 Signed-off-by: Robert Marko <robert.marko@sartura.hr>
11 arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++++++++++++++++++++++++++++
12 1 file changed, 76 insertions(+)
14 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
15 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
20 + switch: switch@c000000 {
21 + compatible = "qca,ipq4019-qca8337n";
22 + reg = <0xc000000 0x80000>, <0x98000 0x800>;
23 + reg-names = "base", "psgmii_phy";
24 + resets = <&gcc ESS_PSGMII_ARES>;
25 + reset-names = "psgmii_rst";
27 + psgmii-ethphy = <&psgmiiphy>;
29 + status = "disabled";
32 + #address-cells = <1>;
39 + phy-mode = "internal";
49 + swport1: port@1 { /* MAC1 */
52 + phy-handle = <ðphy0>;
53 + phy-mode = "psgmii";
55 + status = "disabled";
58 + swport2: port@2 { /* MAC2 */
61 + phy-handle = <ðphy1>;
62 + phy-mode = "psgmii";
64 + status = "disabled";
67 + swport3: port@3 { /* MAC3 */
70 + phy-handle = <ðphy2>;
71 + phy-mode = "psgmii";
73 + status = "disabled";
76 + swport4: port@4 { /* MAC4 */
79 + phy-handle = <ðphy3>;
80 + phy-mode = "psgmii";
82 + status = "disabled";
85 + swport5: port@5 { /* MAC5 */
88 + phy-handle = <ðphy4>;
89 + phy-mode = "psgmii";
91 + status = "disabled";
96 gmac: ethernet@c080000 {
97 compatible = "qcom,ipq4019-ess-edma";
98 reg = <0xc080000 0x8000>;