1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq8062.dtsi"
4 #include <dt-bindings/input/input.h>
6 /delete-node/ &nand_pins;
9 model = "NEC Platforms Aterm WG2600HP3";
10 compatible = "nec,wg2600hp3", "qcom,ipq8062", "qcom,ipq8064";
13 device_type = "memory";
14 reg = <0x42000000 0x1e000000>;
18 label-mac-device = &gmac2;
20 led-boot = &led_power_green;
21 led-failsafe = &led_power_red;
22 led-running = &led_power_green;
23 led-upgrade = &led_power_red;
27 compatible = "gpio-keys";
29 pinctrl-0 = <&buttons_pins>;
30 pinctrl-names = "default";
34 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
35 linux,code = <KEY_RESTART>;
36 debounce-interval = <60>;
42 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
43 linux,code = <KEY_WPS_BUTTON>;
44 debounce-interval = <60>;
50 gpios = <&qcom_pinmux 40 GPIO_ACTIVE_LOW>;
52 linux,input-type = <EV_SW>;
53 debounce-interval = <60>;
59 gpios = <&qcom_pinmux 41 GPIO_ACTIVE_LOW>;
61 linux,input-type = <EV_SW>;
62 debounce-interval = <60>;
68 compatible = "gpio-leds";
70 pinctrl-0 = <&leds_pins>;
71 pinctrl-names = "default";
73 led_power_green: power_green {
74 label = "green:power";
75 gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
78 led_power_red: power_red {
80 gpios = <&qcom_pinmux 35 GPIO_ACTIVE_HIGH>;
84 label = "green:active";
85 gpios = <&qcom_pinmux 42 GPIO_ACTIVE_HIGH>;
90 gpios = <&qcom_pinmux 38 GPIO_ACTIVE_HIGH>;
94 label = "green:wlan2g";
95 gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
96 linux,default-trigger = "phy1tpt";
100 label = "red:wlan2g";
101 gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
105 label = "green:wlan5g";
106 gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
107 linux,default-trigger = "phy0tpt";
111 label = "red:wlan5g";
112 gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
117 gpios = <&qcom_pinmux 46 GPIO_ACTIVE_HIGH>;
122 gpios = <&qcom_pinmux 36 GPIO_ACTIVE_HIGH>;
126 label = "green:converter";
127 gpios = <&qcom_pinmux 43 GPIO_ACTIVE_HIGH>;
131 label = "red:converter";
132 gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
138 pinctrl-0 = <&akro_pins>;
139 pinctrl-names = "default";
143 pins = "gpio18", "gpio19", "gpio21";
149 pins = "gpio18", "gpio19";
150 drive-strength = <10>;
155 drive-strength = <10>;
160 drive-strength = <12>;
164 buttons_pins: buttons_pins {
166 pins = "gpio22", "gpio24", "gpio40",
169 drive-strength = <2>;
174 leds_pins: leds_pins {
176 pins = "gpio14", "gpio15", "gpio35",
177 "gpio36", "gpio38", "gpio42",
178 "gpio43", "gpio46", "gpio55",
179 "gpio56", "gpio57", "gpio58";
185 pins = "gpio15", "gpio35", "gpio38",
186 "gpio42", "gpio43", "gpio46",
187 "gpio55", "gpio56", "gpio57",
189 drive-strength = <2>;
193 pins = "gpio14", "gpio36";
194 drive-strength = <4>;
199 * Stock firmware has the following settings, so let's do the same.
200 * I don't sure why these are required.
202 akro_pins: akro_pinmux {
204 pins = "gpio17", "gpio26", "gpio47";
206 drive-strength = <2>;
213 drive-strength = <2>;
221 drive-strength = <8>;
229 qcom,mode = <GSBI_PROT_SPI>;
234 pinctrl-0 = <&spi_pins>;
235 pinctrl-names = "default";
237 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
240 compatible = "jedec,spi-nor";
242 spi-max-frequency = <50000000>;
246 compatible = "fixed-partitions";
247 #address-cells = <1>;
252 reg = <0x0000000 0x0020000>;
258 reg = <0x0020000 0x0020000>;
264 reg = <0x0040000 0x0040000>;
270 reg = <0x0080000 0x0080000>;
276 reg = <0x0100000 0x0010000>;
282 reg = <0x0110000 0x0010000>;
288 reg = <0x0120000 0x0080000>;
294 reg = <0x01a0000 0x0080000>;
300 reg = <0x0220000 0x0080000>;
306 reg = <0x02a0000 0x0010000>;
310 factory: partition@2b0000 {
311 label = "PRODUCTDATA";
312 reg = <0x02b0000 0x0030000>;
318 reg = <0x02e0000 0x0040000>;
320 compatible = "nvmem-cells";
321 #address-cells = <1>;
324 precal_ART_1000: precal@1000 {
325 reg = <0x1000 0x2f20>;
328 precal_ART_5000: precal@5000 {
329 reg = <0x5000 0x2f20>;
335 reg = <0x0320000 0x0040000>;
341 reg = <0x0360000 0x0500000>;
346 compatible = "denx,uimage";
348 reg = <0x0860000 0x17a0000>;
363 reg = <0x00000000 0 0 0 0>;
364 #address-cells = <3>;
369 compatible = "qcom,ath10k";
370 reg = <0x00010000 0 0 0 0>;
372 qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
374 nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
375 nvmem-cell-names = "mac-address", "pre-calibration";
385 reg = <0x00000000 0 0 0 0>;
386 #address-cells = <3>;
391 compatible = "qcom,ath10k";
392 reg = <0x00010000 0 0 0 0>;
394 ieee80211-freq-limit = <2400000 2483000>;
395 qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
397 nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
398 nvmem-cell-names = "mac-address", "pre-calibration";
406 pinctrl-0 = <&mdio0_pins>;
407 pinctrl-names = "default";
409 phy0: ethernet-phy@0 {
411 qca,ar8327-initvals = <
412 0x04 0x80080080 /* PAD0_MODE */
413 0x0c 0x06000000 /* PAD6_MODE */
414 0x10 0x002613a0 /* PWS_REG */
415 0x50 0xcc36cc36 /* LED_CTRL0 */
416 0x54 0xca36ca36 /* LED_CTRL1 */
417 0x58 0xc936c936 /* LED_CTRL2 */
418 0x5c 0x03ffff00 /* LED_CTRL3 */
419 0x7c 0x0000004e /* PORT0_STATUS */
420 0x94 0x0000004e /* PORT6_STATUS */
421 0xe0 0xc74164de /* SGMII_CTRL */
422 0xe4 0x0006a545 /* MAC_PWR_SEL */
430 pinctrl-0 = <&rgmii2_pins>;
431 pinctrl-names = "default";
436 nvmem-cells = <&macaddr_factory_0>;
437 nvmem-cell-names = "mac-address";
450 nvmem-cells = <&macaddr_factory_6>;
451 nvmem-cell-names = "mac-address";
460 compatible = "nvmem-cells";
461 #address-cells = <1>;
464 macaddr_factory_0: macaddr@0 {
468 macaddr_factory_6: macaddr@6 {
472 macaddr_PRODUCTDATA_c: macaddr@c {
476 macaddr_PRODUCTDATA_12: macaddr@12 {