1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-ipq8064-v2.0-smb208.dtsi"
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
9 compatible = "asrock,g10", "qcom,ipq8064";
16 led-boot = &led_status_blue;
17 led-failsafe = &led_status_amber;
18 led-running = &led_status_blue;
19 led-upgrade = &led_status_amber;
23 bootargs-override = "console=ttyMSM0,115200n8";
27 compatible = "gpio-leds";
29 pinctrl-0 = <&led_pins>;
30 pinctrl-names = "default";
33 * this is a bit misleading. Because there are about seven
34 * multicolor LEDs connected all wired together in parallel.
38 function = LED_FUNCTION_STATUS;
39 color = <LED_COLOR_ID_YELLOW>;
40 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
43 led_status_amber: status_amber {
44 function = LED_FUNCTION_STATUS;
45 color = <LED_COLOR_ID_AMBER>;
46 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
49 led_status_blue: status_blue {
50 function = LED_FUNCTION_STATUS;
51 color = <LED_COLOR_ID_BLUE>;
52 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
56 * LED is declared in vendors boardfile but it's not
57 * working and the manual doesn't mention anything
58 * about the LED being white.
61 function = LED_FUNCTION_STATUS;
62 color = <LED_COLOR_ID_WHITE>;
63 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
72 compatible = "i2c-gpio";
73 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>, /* sda */
74 <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; /* scl */
75 i2c-gpio,delay-us = <5>;
76 i2c-gpio,scl-output-only;
80 compatible = "sonix,sn8f25e21";
85 compatible = "gpio-keys";
87 pinctrl-0 = <&button_pins>;
88 pinctrl-names = "default";
92 gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>;
94 debounce-interval = <60>;
100 gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
101 linux,code = <KEY_RESTART>;
102 debounce-interval = <60>;
108 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
109 linux,code = <KEY_WPS_BUTTON>;
110 debounce-interval = <60>;
116 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
117 linux,code = <KEY_WPS_BUTTON>;
118 debounce-interval = <60>;
131 pinctrl-0 = <&rgmii2_pins>;
132 pinctrl-names = "default";
156 pinctrl-0 = <&uart0_pins>;
157 pinctrl-names = "default";
163 pinctrl-0 = <&mdio0_pins>;
164 pinctrl-names = "default";
167 compatible = "qca,qca8337";
168 #address-cells = <1>;
173 #address-cells = <1>;
181 tx-internal-delay-ps = <1000>;
182 rx-internal-delay-ps = <1000>;
193 phy-mode = "internal";
194 phy-handle = <&phy_port1>;
200 phy-mode = "internal";
201 phy-handle = <&phy_port2>;
207 phy-mode = "internal";
208 phy-handle = <&phy_port3>;
214 phy-mode = "internal";
215 phy-handle = <&phy_port4>;
221 phy-mode = "internal";
222 phy-handle = <&phy_port5>;
230 qca,sgmii-enable-pll;
240 #address-cells = <1>;
271 compatible = "qcom,nandcs";
273 nand-ecc-strength = <4>;
274 nand-bus-width = <8>;
275 nand-ecc-step-size = <512>;
278 qcom,boot-partitions = <0x0 0x1200000>;
281 compatible = "qcom,smem-part";
290 reg = <0x00000000 0 0 0 0>;
291 #address-cells = <3>;
296 reg = <0x00010000 0 0 0 0>;
297 compatible = "qcom,ath10k";
298 qcom,ath10k-calibration-variant = "ASRock-G10";
307 reg = <0x00000000 0 0 0 0>;
308 #address-cells = <3>;
313 reg = <0x00010000 0 0 0 0>;
314 compatible = "qcom,ath10k";
315 qcom,ath10k-calibration-variant = "ASRock-G10";
323 pins = "gpio7", "gpio8", "gpio9", "gpio26";
325 drive-strength = <2>;
330 button_pins: button_pins {
332 pins = "gpio15", "gpio16", "gpio64", "gpio65";
334 drive-strength = <2>;
339 uart0_pins: uart0_pins {
341 pins = "gpio10", "gpio11";
343 drive-strength = <10>;
350 pinctrl-0 = <&i2c4_pins>;
351 pinctrl-names = "default";
379 qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
382 /delete-node/ &pcie2_pins;
383 /delete-node/ &pcie2;