1 // SPDX-License-Identifier: GPL-2.0-or-later
3 #include "qcom-ipq8065-smb208.dtsi"
4 #include <dt-bindings/input/input.h>
7 model = "Arris TR4400 v2";
8 compatible = "arris,tr4400-v2", "qcom,ipq8065", "qcom,ipq8064";
11 reg = <0x42000000 0x1e000000>;
12 device_type = "memory";
16 led-boot = &led_status_blue;
17 led-failsafe = &led_status_red;
18 led-running = &led_status_blue;
19 led-upgrade = &led_status_red;
23 bootargs = "rootfstype=squashfs noinitrd";
27 compatible = "gpio-keys";
28 pinctrl-0 = <&button_pins>;
29 pinctrl-names = "default";
33 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
34 linux,code = <KEY_RESTART>;
35 debounce-interval = <60>;
41 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_WPS_BUTTON>;
43 debounce-interval = <60>;
49 compatible = "gpio-leds";
50 pinctrl-0 = <&led_pins>;
51 pinctrl-names = "default";
53 led_status_red: status_red {
55 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
58 led_status_blue: status_blue {
59 label = "blue:status";
60 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
66 button_pins: button_pins {
68 pins = "gpio6", "gpio54";
77 pins = "gpio7", "gpio8";
84 rgmii2_pins: rgmii2-pins {
86 pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
94 drive-strength = <12>;
100 qcom,mode = <GSBI_PROT_SPI>;
106 pinctrl-0 = <&spi_pins>;
107 pinctrl-names = "default";
109 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
112 compatible = "everspin,mr25h256";
113 spi-max-frequency = <40000000>;
124 compatible = "qcom,nandcs";
126 nand-ecc-strength = <4>;
127 nand-bus-width = <8>;
128 nand-ecc-step-size = <512>;
130 qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>;
133 compatible = "fixed-partitions";
134 #address-cells = <1>;
139 reg = <0x0000000 0x0040000>;
144 reg = <0x0040000 0x0140000>;
149 reg = <0x0180000 0x0140000>;
154 reg = <0x02c0000 0x0280000>;
158 label = "0:DDRCONFIG";
159 reg = <0x0540000 0x0120000>;
164 reg = <0x0660000 0x0120000>;
169 reg = <0x0780000 0x0280000>;
174 reg = <0x0a00000 0x0280000>;
179 reg = <0x0c80000 0x0500000>;
183 label = "0:APPSBLENV";
184 reg = <0x1180000 0x0080000>;
188 reg = <0x1200000 0x0140000>;
192 compatible = "fixed-layout";
193 #address-cells = <1>;
196 precal_ART_1000: precal@1000 {
197 reg = <0x1000 0x2f20>;
199 precal_ART_5000: precal@5000 {
200 reg = <0x5000 0x2f20>;
204 stock_partition@1340000 {
205 label = "stock_rootfs";
206 reg = <0x1340000 0x4000000>;
209 label = "0:BOOTCONFIG";
210 reg = <0x5340000 0x0060000>;
215 reg = <0x53a0000 0x0140000>;
220 reg = <0x54e0000 0x0280000>;
224 label = "0:DDRCONFIG_1";
225 reg = <0x5760000 0x0120000>;
230 reg = <0x5880000 0x0120000>;
235 reg = <0x59a0000 0x0280000>;
240 reg = <0x5c20000 0x0280000>;
244 label = "0:BOOTCONFIG1";
245 reg = <0x5ea0000 0x0060000>;
249 label = "0:APPSBL_1";
250 reg = <0x5f00000 0x0500000>;
253 stock_partition@6400000 {
254 label = "stock_rootfs_1";
255 reg = <0x6400000 0x4000000>;
257 stock_partition@a400000 {
258 label = "stock_fw_env";
259 reg = <0xa400000 0x0100000>;
261 stock_partition@a500000 {
262 label = "stock_config";
263 reg = <0xa500000 0x0800000>;
265 stock_partition@ad00000 {
267 reg = <0xad00000 0x0200000>;
269 stock_partition@af00000 {
270 label = "stock_scfgmgr";
271 reg = <0xaf00000 0x0100000>;
276 reg = <0x6400000 0x0100000>;
279 compatible = "fixed-layout";
280 #address-cells = <1>;
283 macaddr_fw_env_0: macaddr@0 {
286 macaddr_fw_env_6: macaddr@6 {
289 macaddr_fw_env_c: macaddr@c {
292 macaddr_fw_env_12: macaddr@12 {
295 macaddr_fw_env_18: macaddr@18 {
302 reg = <0x6500000 0x9b00000>;
306 reg = <0x1340000 0x4000000>;
315 pinctrl-0 = <&mdio0_pins>;
316 pinctrl-names = "default";
319 compatible = "qca,qca8337";
320 #address-cells = <1>;
325 #address-cells = <1>;
333 tx-internal-delay-ps = <1000>;
334 rx-internal-delay-ps = <1000>;
345 phy-mode = "internal";
346 phy-handle = <&phy_port1>;
352 phy-mode = "internal";
353 phy-handle = <&phy_port2>;
359 phy-mode = "internal";
360 phy-handle = <&phy_port3>;
366 phy-mode = "internal";
367 phy-handle = <&phy_port4>;
375 qca,sgmii-enable-pll;
385 #address-cells = <1>;
406 phy7: ethernet-phy@7 {
416 nvmem-cells = <&macaddr_fw_env_18>;
417 nvmem-cell-names = "mac-address";
419 pinctrl-0 = <&rgmii2_pins>;
420 pinctrl-names = "default";
433 nvmem-cells = <&macaddr_fw_env_0>;
434 nvmem-cell-names = "mac-address";
446 phy-handle = <&phy7>;
448 nvmem-cells = <&macaddr_fw_env_6>;
449 nvmem-cell-names = "mac-address";
470 reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
471 pinctrl-0 = <&pcie0_pins>;
472 pinctrl-names = "default";
475 reg = <0x00000000 0 0 0 0>;
476 #address-cells = <3>;
481 compatible = "pci168c,0046";
482 reg = <0x00010000 0 0 0 0>;
484 nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
485 nvmem-cell-names = "pre-calibration", "mac-address";
492 reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
493 pinctrl-0 = <&pcie1_pins>;
494 pinctrl-names = "default";
495 max-link-speed = <1>;
498 reg = <0x00000000 0 0 0 0>;
499 #address-cells = <3>;
504 compatible = "pci168c,0040";
505 reg = <0x00010000 0 0 0 0>;
507 nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
508 nvmem-cell-names = "pre-calibration", "mac-address";