1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq8064-v2.0.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
9 model = "Extreme Networks AP3935";
10 compatible = "extreme,ap3935", "qcom,ipq8064";
13 reg = <0x41400000 0x3ec00000>;
14 device_type = "memory";
18 serial0 = &gsbi7_serial;
19 serial1 = &gsbi2_serial;
24 led-boot = &led_power_green;
25 led-failsafe = &led_power_orange;
26 led-running = &led_power_green;
27 led-upgrade = &led_power_green;
31 stdout-path = "serial0:115200n8";
32 bootargs-override = "ubi.block=0,0 root=/dev/ubiblock0_0";
36 compatible = "gpio-keys";
37 pinctrl-0 = <&button_pins>;
38 pinctrl-names = "default";
42 gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
43 linux,code = <KEY_RESTART>;
44 debounce-interval = <60>;
50 compatible = "gpio-leds";
51 pinctrl-0 = <&led_pins>;
52 pinctrl-names = "default";
54 led_power_green: power_green {
55 label = "green:power";
56 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
59 led_power_orange: power_orange {
60 label = "orange:power";
61 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
65 label = "green:wlan2g";
66 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
67 linux,default-trigger = "phy0tpt";
71 label = "green:wlan5g";
72 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
73 linux,default-trigger = "phy1tpt";
78 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
82 label = "orange:lan1";
83 gpios = <&qcom_pinmux 27 GPIO_ACTIVE_LOW>;
88 gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
92 label = "orange:lan2";
93 gpios = <&qcom_pinmux 29 GPIO_ACTIVE_LOW>;
102 pins = "gpio18", "gpio19";
104 drive-strength = <10>;
111 drive-strength = <12>;
118 drive-strength = <10>;
125 pins = "gpio22", "gpio23", "gpio24", "gpio25",
126 "gpio26", "gpio27", "gpio28", "gpio29";
128 drive-strength = <10>;
133 button_pins: button_pins {
143 qcom,mode = <GSBI_PROT_I2C_UART>;
146 gsbi2_serial: serial@12490000 {
152 qcom,mode = <GSBI_PROT_I2C_UART>;
161 qcom,mode = <GSBI_PROT_I2C_UART>;
164 gsbi7_serial: serial@16640000 {
170 qcom,mode = <GSBI_PROT_SPI>;
175 spi-max-frequency = <50000000>;
177 pinctrl-0 = <&spi_pins>;
178 pinctrl-names = "default";
180 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
183 compatible = "jedec,spi-nor";
184 spi-max-frequency = <50000000>;
188 compatible = "fixed-partitions";
189 #address-cells = <1>;
193 compatible = "u-boot,env-redundant-bool";
195 reg = <0x2a0000 0x0010000>;
203 reg = <0x2b0000 0x0080000>;
208 reg = <0x330000 0x0010000>;
213 reg = <0x340000 0x0080000>;
218 reg = <0x3c0000 0x0e10000>;
223 reg = <0x11d0000 0x0e10000>;
233 /delete-property/ pinctrl-0;
234 /delete-property/ pinctrl-names;
237 reg = <0x00000000 0 0 0 0>;
238 #address-cells = <3>;
243 compatible = "qcom,ath10k";
245 reg = <0x00010000 0 0 0 0>;
253 /delete-property/ pinctrl-0;
254 /delete-property/ pinctrl-names;
257 reg = <0x00000000 0 0 0 0>;
258 #address-cells = <3>;
263 compatible = "qcom,ath10k";
265 reg = <0x00010000 0 0 0 0>;
273 pinctrl-0 = <&nand_pins>;
274 pinctrl-names = "default";
277 compatible = "qcom,nandcs";
281 nand-ecc-strength = <8>;
282 nand-bus-width = <8>;
283 nand-ecc-step-size = <512>;
286 compatible = "fixed-partitions";
287 #address-cells = <1>;
292 reg = <0x0000000 0x20000000>;
300 compatible = "virtual,mdio-gpio";
301 #address-cells = <1>;
306 pinctrl-0 = <&mdio0_pins>;
307 pinctrl-names = "default";
309 gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
311 phy1: ethernet-phy@1 {
315 phy2: ethernet-phy@2 {
328 phy-handle = <&phy1>;
330 nvmem-cells = <ðaddr>;
331 nvmem-cell-names = "mac-address";
346 phy-handle = <&phy2>;