1 // SPDX-License-Identifier: GPL-2.0-or-later
3 #include "qcom-ipq8065-smb208.dtsi"
4 #include <dt-bindings/input/input.h>
7 model = "Askey RT4230W REV6";
8 compatible = "askey,rt4230w-rev6", "qcom,ipq8065", "qcom,ipq8064";
11 reg = <0x42000000 0x3e000000>;
12 device_type = "memory";
17 led-failsafe = &ledctrl1;
18 led-running = &ledctrl2;
19 led-upgrade = &ledctrl3;
23 bootargs = "rootfstype=squashfs noinitrd";
27 compatible = "gpio-keys";
28 pinctrl-0 = <&button_pins>;
29 pinctrl-names = "default";
33 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
34 linux,code = <KEY_RESTART>;
39 gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
40 linux,code = <KEY_WPS_BUTTON>;
45 compatible = "gpio-leds";
46 pinctrl-0 = <&led_pins>;
47 pinctrl-names = "default";
51 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
56 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
61 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
67 button_pins: button_pins {
69 pins = "gpio54", "gpio68";
78 pins = "gpio22", "gpio23", "gpio24";
85 rgmii2_pins: rgmii2-pins {
87 pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31",
88 "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62";
95 pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
103 drive-strength = <12>;
109 qcom,mode = <GSBI_PROT_SPI>;
115 pinctrl-0 = <&spi_pins>;
116 pinctrl-names = "default";
118 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
121 compatible = "everspin,mr25h256";
122 #address-cells = <1>;
124 spi-max-frequency = <40000000>;
135 compatible = "qcom,nandcs";
137 nand-ecc-strength = <4>;
138 nand-bus-width = <8>;
139 nand-ecc-step-size = <512>;
141 qcom,boot-partitions = <0x0 0x1180000 0x1340000 0x10c0000>;
144 compatible = "fixed-partitions";
145 #address-cells = <1>;
150 reg = <0x0000000 0x0040000>;
156 reg = <0x0040000 0x0140000>;
162 reg = <0x0180000 0x0140000>;
168 reg = <0x02c0000 0x0280000>;
173 label = "0:DDRCONFIG";
174 reg = <0x0540000 0x0120000>;
180 reg = <0x0660000 0x0120000>;
186 reg = <0x0780000 0x0280000>;
192 reg = <0x0a00000 0x0280000>;
198 reg = <0x0c80000 0x0500000>;
203 label = "0:APPSBLENV";
204 reg = <0x1180000 0x0080000>;
209 reg = <0x1200000 0x0140000>;
211 compatible = "nvmem-cells";
212 #address-cells = <1>;
215 macaddr_ART_0: macaddr@0 {
219 macaddr_ART_6: macaddr@6 {
223 precal_ART_1000: precal@1000 {
224 reg = <0x1000 0x2f20>;
227 precal_ART_5000: precal@5000 {
228 reg = <0x5000 0x2f20>;
233 label = "0:BOOTCONFIG";
234 reg = <0x1340000 0x0060000>;
240 reg = <0x13a0000 0x0140000>;
246 reg = <0x14e0000 0x0280000>;
251 label = "0:DDRCONFIG_1";
252 reg = <0x1760000 0x0120000>;
258 reg = <0x1880000 0x0120000>;
264 reg = <0x19a0000 0x0280000>;
270 reg = <0x1c20000 0x0280000>;
275 label = "0:BOOTCONFIG1";
276 reg = <0x1ea0000 0x0060000>;
281 label = "0:APPSBL_1";
282 reg = <0x1f00000 0x0500000>;
288 reg = <0x2400000 0x1a000000>;
297 pinctrl-0 = <&mdio0_pins>;
298 pinctrl-names = "default";
300 phy0: ethernet-phy@0 {
302 qca,ar8327-initvals = <
303 0x00004 0x7600000 /* PAD0_MODE */
304 0x00008 0x1000000 /* PAD5_MODE */
305 0x0000c 0x80 /* PAD6_MODE */
306 0x000e4 0xaa545 /* MAC_POWER_SEL */
307 0x000e0 0xc74164de /* SGMII_CTRL */
308 0x0007c 0x4e /* PORT0_STATUS */
309 0x00094 0x4e /* PORT6_STATUS */
310 0x00050 0xcf02cf02 /* LED_CTRL_0 */
311 0x00054 0xc832c832 /* LED_CTRL_1 */
321 nvmem-cells = <&macaddr_ART_0>;
322 nvmem-cell-names = "mac-address";
324 pinctrl-0 = <&rgmii2_pins>;
325 pinctrl-names = "default";
338 nvmem-cells = <&macaddr_ART_6>;
339 nvmem-cell-names = "mac-address";
377 reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
378 pinctrl-0 = <&pcie0_pins>;
379 pinctrl-names = "default";
382 reg = <0x00000000 0 0 0 0>;
383 #address-cells = <3>;
388 compatible = "pci168c,0046";
389 reg = <0x00010000 0 0 0 0>;
391 nvmem-cells = <&precal_ART_1000>;
392 nvmem-cell-names = "pre-calibration";
399 reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
400 pinctrl-0 = <&pcie1_pins>;
401 pinctrl-names = "default";
402 max-link-speed = <1>;
405 reg = <0x00000000 0 0 0 0>;
406 #address-cells = <3>;
411 compatible = "pci168c,0046";
412 reg = <0x00010000 0 0 0 0>;
414 nvmem-cells = <&precal_ART_5000>;
415 nvmem-cell-names = "pre-calibration";