e114ff96e17f3bd5be6144e8d681f397558d276a
[openwrt/staging/rmilecki.git] / target / linux / ipq806x / files-5.4 / arch / arm / boot / dts / qcom-ipq8064-ap161.dts
1 #include "qcom-ipq8064-v1.0.dtsi"
2
3 / {
4 model = "Qualcomm IPQ8064/AP161";
5 compatible = "qcom,ipq8064-ap161", "qcom,ipq8064";
6
7 memory@0 {
8 reg = <0x42000000 0x1e000000>;
9 device_type = "memory";
10 };
11
12 reserved-memory {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 ranges;
16 rsvd@41200000 {
17 reg = <0x41200000 0x300000>;
18 no-map;
19 };
20 };
21
22 aliases {
23 serial0 = &gsbi4_serial;
24 mdio-gpio0 = &mdio0;
25 };
26
27 chosen {
28 stdout-path = "serial0:115200n8";
29 };
30
31 soc {
32 mdio0: mdio@37000000 {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 compatible = "qcom,ipq8064-mdio", "syscon";
37 reg = <0x37000000 0x200000>;
38 resets = <&gcc GMAC_CORE1_RESET>;
39 reset-names = "stmmaceth";
40 clocks = <&gcc GMAC_CORE1_CLK>;
41 clock-names = "stmmaceth";
42
43 pinctrl-0 = <&mdio0_pins>;
44 pinctrl-names = "default";
45
46 phy0: ethernet-phy@0 {
47 reg = <0>;
48 qca,ar8327-initvals = <
49 0x00004 0x7600000 /* PAD0_MODE */
50 0x00008 0x1000000 /* PAD5_MODE */
51 0x0000c 0x20080 /* PAD6_MODE */
52 0x000e4 0x6a545 /* MAC_POWER_SEL */
53 0x000e0 0xc74164de /* SGMII_CTRL */
54 0x0007c 0x4e /* PORT0_STATUS */
55 0x00094 0x4e /* PORT6_STATUS */
56 >;
57 };
58
59 phy4: ethernet-phy@4 {
60 reg = <4>;
61 qca,phy-rgmii-en;
62 qca,txclk-delay-en;
63 qca,rxclk-delay-en;
64 };
65
66 phy3: ethernet-phy@3 {
67 device_type = "ethernet-phy";
68 reg = <3>;
69 };
70 };
71 };
72 };
73
74 &qcom_pinmux {
75 i2c4_pins: i2c4_pinmux {
76 pins = "gpio12", "gpio13";
77 function = "gsbi4";
78 bias-disable;
79 };
80
81 spi_pins: spi_pins {
82 mux {
83 pins = "gpio18", "gpio19", "gpio21";
84 function = "gsbi5";
85 drive-strength = <10>;
86 bias-none;
87 };
88 };
89 nand_pins: nand_pins {
90 disable {
91 pins = "gpio34", "gpio35", "gpio36",
92 "gpio37", "gpio38";
93 function = "nand";
94 drive-strength = <10>;
95 bias-disable;
96 };
97
98 pullups {
99 pins = "gpio39";
100 function = "nand";
101 drive-strength = <10>;
102 bias-pull-up;
103 };
104
105 hold {
106 pins = "gpio40", "gpio41", "gpio42",
107 "gpio43", "gpio44", "gpio45",
108 "gpio46", "gpio47";
109 function = "nand";
110 drive-strength = <10>;
111 bias-bus-hold;
112 };
113 };
114
115 mdio0_pins: mdio0_pins {
116 mux {
117 pins = "gpio0", "gpio1";
118 function = "mdio";
119 drive-strength = <8>;
120 bias-disable;
121 };
122 };
123
124 rgmii2_pins: rgmii2_pins {
125 mux {
126 pins = "gpio2", "gpio27", "gpio28",
127 "gpio29", "gpio30", "gpio31",
128 "gpio32", "gpio51", "gpio52",
129 "gpio59", "gpio60", "gpio61",
130 "gpio62" , "gpio66";
131 function = "rgmii2";
132 drive-strength = <8>;
133 bias-disable;
134 };
135 };
136 };
137
138 &gsbi4 {
139 qcom,mode = <GSBI_PROT_I2C_UART>;
140 status = "okay";
141 serial@16340000 {
142 status = "okay";
143 };
144
145 /*
146 * The i2c device on gsbi4 should not be enabled.
147 * On ipq806x designs gsbi4 i2c is meant for exclusive
148 * RPM usage. Turning this on in kernel manifests as
149 * i2c failure for the RPM.
150 */
151 };
152
153 &gsbi5 {
154 qcom,mode = <GSBI_PROT_SPI>;
155 status = "okay";
156
157 spi4: spi@1a280000 {
158 status = "okay";
159 spi-max-frequency = <50000000>;
160
161 pinctrl-0 = <&spi_pins>;
162 pinctrl-names = "default";
163
164 cs-gpios = <&qcom_pinmux 20 0>;
165
166 m25p80@0 {
167 compatible = "s25fl256s1";
168 #address-cells = <1>;
169 #size-cells = <1>;
170 spi-max-frequency = <50000000>;
171 reg = <0>;
172
173 partitions {
174 compatible = "qcom,smem";
175 };
176 };
177 };
178 };
179
180 &sata_phy {
181 status = "okay";
182 };
183
184 &sata {
185 status = "okay";
186 };
187
188 &usb3_0 {
189 status = "okay";
190 };
191
192 &usb3_1 {
193 status = "okay";
194 };
195
196 &pcie0 {
197 status = "okay";
198 };
199
200 &pcie1 {
201 status = "okay";
202 force_gen1 = <1>;
203 };
204
205 &pcie2 {
206 status = "okay";
207 };
208
209 &nand_controller {
210 status = "okay";
211
212 pinctrl-0 = <&nand_pins>;
213 pinctrl-names = "default";
214
215 nand@0 {
216 reg = <0>;
217 compatible = "qcom,nandcs";
218
219 nand-ecc-strength = <4>;
220 nand-bus-width = <8>;
221 nand-ecc-step-size = <512>;
222
223 partitions {
224 compatible = "qcom,smem";
225 };
226 };
227 };
228
229 &gmac0 {
230 status = "okay";
231 phy-mode = "rgmii";
232 qcom,id = <0>;
233
234 pinctrl-0 = <&rgmii2_pins>;
235 pinctrl-names = "default";
236 mdiobus = <&mdio0>;
237
238 fixed-link {
239 speed = <1000>;
240 full-duplex;
241 };
242 };
243
244 &gmac1 {
245 status = "okay";
246 phy-mode = "rgmii";
247 qcom,id = <1>;
248 mdiobus = <&mdio0>;
249
250 fixed-link {
251 speed = <1000>;
252 full-duplex;
253 };
254 };
255
256 &gmac2 {
257 status = "okay";
258 phy-mode = "sgmii";
259 qcom,id = <2>;
260 mdiobus = <&mdio0>;
261
262 fixed-link {
263 speed = <1000>;
264 full-duplex;
265 };
266 };
267
268 &adm_dma {
269 status = "okay";
270 };