ipq806x: move common pinmux nodes to SoC DTSI
[openwrt/staging/981213.git] / target / linux / ipq806x / files-5.4 / arch / arm / boot / dts / qcom-ipq8064-d7800.dts
1 #include "qcom-ipq8064-v2.0.dtsi"
2
3 #include <dt-bindings/input/input.h>
4
5 / {
6 model = "Netgear Nighthawk X4 D7800";
7 compatible = "netgear,d7800", "qcom,ipq8064";
8
9 memory@0 {
10 reg = <0x42000000 0xe000000>;
11 device_type = "memory";
12 };
13
14 reserved-memory {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 ranges;
18 rsvd@41200000 {
19 reg = <0x41200000 0x300000>;
20 no-map;
21 };
22 };
23
24 aliases {
25 serial0 = &gsbi4_serial;
26 mdio-gpio0 = &mdio0;
27
28 led-boot = &power_white;
29 led-failsafe = &power_amber;
30 led-running = &power_white;
31 led-upgrade = &power_amber;
32 };
33
34 chosen {
35 bootargs = "rootfstype=squashfs noinitrd";
36 stdout-path = "serial0:115200n8";
37 };
38
39 keys {
40 compatible = "gpio-keys";
41 pinctrl-0 = <&button_pins>;
42 pinctrl-names = "default";
43
44 wifi {
45 label = "wifi";
46 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
47 linux,code = <KEY_RFKILL>;
48 };
49
50 reset {
51 label = "reset";
52 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
53 linux,code = <KEY_RESTART>;
54 };
55
56 wps {
57 label = "wps";
58 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
59 linux,code = <KEY_WPS_BUTTON>;
60 };
61 };
62
63 leds {
64 compatible = "gpio-leds";
65 pinctrl-0 = <&led_pins>;
66 pinctrl-names = "default";
67
68 usb1 {
69 label = "d7800:white:usb1";
70 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
71 };
72
73 usb2 {
74 label = "d7800:white:usb2";
75 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
76 };
77
78 power_amber: power_amber {
79 label = "d7800:amber:power";
80 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
81 };
82
83 wan_white {
84 label = "d7800:white:wan";
85 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
86 };
87
88 wan_amber {
89 label = "d7800:amber:wan";
90 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
91 };
92
93 wps {
94 label = "d7800:white:wps";
95 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
96 };
97
98 esata {
99 label = "d7800:white:esata";
100 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
101 };
102
103 power_white: power_white {
104 label = "d7800:white:power";
105 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
106 default-state = "keep";
107 };
108
109 wifi {
110 label = "d7800:white:wifi";
111 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
112 };
113 };
114 };
115
116 &qcom_pinmux {
117 button_pins: button_pins {
118 mux {
119 pins = "gpio6", "gpio54", "gpio65";
120 function = "gpio";
121 drive-strength = <2>;
122 bias-pull-up;
123 };
124 };
125
126 led_pins: led_pins {
127 mux {
128 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
129 "gpio24","gpio26", "gpio53", "gpio64";
130 function = "gpio";
131 drive-strength = <2>;
132 bias-pull-up;
133 };
134 };
135
136 usb0_pwr_en_pins: usb0_pwr_en_pins {
137 mux {
138 pins = "gpio15";
139 function = "gpio";
140 drive-strength = <12>;
141 bias-pull-down;
142 output-high;
143 };
144 };
145
146 usb1_pwr_en_pins: usb1_pwr_en_pins {
147 mux {
148 pins = "gpio16", "gpio68";
149 function = "gpio";
150 drive-strength = <12>;
151 bias-pull-down;
152 output-high;
153 };
154 };
155 };
156
157 &gsbi4 {
158 qcom,mode = <GSBI_PROT_I2C_UART>;
159 status = "okay";
160 serial@16340000 {
161 status = "okay";
162 };
163 /*
164 * The i2c device on gsbi4 should not be enabled.
165 * On ipq806x designs gsbi4 i2c is meant for exclusive
166 * RPM usage. Turning this on in kernel manifests as
167 * i2c failure for the RPM.
168 */
169 };
170
171 &sata_phy {
172 status = "okay";
173 };
174
175 &sata {
176 ports-implemented = <0x1>;
177 status = "okay";
178 };
179
180 &usb3_0 {
181 status = "okay";
182
183 pinctrl-0 = <&usb0_pwr_en_pins>;
184 pinctrl-names = "default";
185 };
186
187 &usb3_1 {
188 status = "okay";
189
190 pinctrl-0 = <&usb1_pwr_en_pins>;
191 pinctrl-names = "default";
192 };
193
194 &pcie0 {
195 status = "okay";
196 reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
197 pinctrl-0 = <&pcie0_pins>;
198 pinctrl-names = "default";
199 };
200
201 &pcie1 {
202 status = "okay";
203 reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
204 pinctrl-0 = <&pcie1_pins>;
205 pinctrl-names = "default";
206 force_gen1 = <1>;
207 };
208
209 &nand_controller {
210 status = "okay";
211
212 pinctrl-0 = <&nand_pins>;
213 pinctrl-names = "default";
214
215 #address-cells = <1>;
216 #size-cells = <0>;
217
218 nand@0 {
219 reg = <0>;
220 compatible = "qcom,nandcs";
221
222 nand-ecc-strength = <4>;
223 nand-bus-width = <8>;
224 nand-ecc-step-size = <512>;
225
226 partitions {
227 compatible = "fixed-partitions";
228 #address-cells = <1>;
229 #size-cells = <1>;
230
231 qcadata@0 {
232 label = "qcadata";
233 reg = <0x0000000 0x0c80000>;
234 read-only;
235 };
236
237 APPSBL@c80000 {
238 label = "APPSBL";
239 reg = <0x0c80000 0x0500000>;
240 read-only;
241 };
242
243 APPSBLENV@1180000 {
244 label = "APPSBLENV";
245 reg = <0x1180000 0x0080000>;
246 read-only;
247 };
248
249 art: art@1200000 {
250 label = "art";
251 reg = <0x1200000 0x0140000>;
252 read-only;
253 };
254
255 artbak: art@1340000 {
256 label = "artbak";
257 reg = <0x1340000 0x0140000>;
258 read-only;
259 };
260
261 kernel@1480000 {
262 label = "kernel";
263 reg = <0x1480000 0x0400000>;
264 };
265
266 ubi@1880000 {
267 label = "ubi";
268 reg = <0x1880000 0x1C00000>;
269 };
270
271 netgear@3480000 {
272 label = "netgear";
273 reg = <0x3480000 0x4480000>;
274 read-only;
275 };
276
277 reserve@7900000 {
278 label = "reserve";
279 reg = <0x7900000 0x0700000>;
280 read-only;
281 };
282 };
283 };
284 };
285
286 &mdio0 {
287 status = "okay";
288
289 pinctrl-0 = <&mdio0_pins>;
290 pinctrl-names = "default";
291
292 phy0: ethernet-phy@0 {
293 reg = <0>;
294 qca,ar8327-initvals = <
295 0x00004 0x7600000 /* PAD0_MODE */
296 0x00008 0x1000000 /* PAD5_MODE */
297 0x0000c 0x80 /* PAD6_MODE */
298 0x000e4 0x6a545 /* MAC_POWER_SEL */
299 0x000e0 0xc74164de /* SGMII_CTRL */
300 0x0007c 0x4e /* PORT0_STATUS */
301 0x00094 0x4e /* PORT6_STATUS */
302 >;
303 };
304
305 phy4: ethernet-phy@4 {
306 reg = <4>;
307 };
308 };
309
310 &gmac1 {
311 status = "okay";
312 phy-mode = "rgmii";
313 phy-handle = <&phy4>;
314 qcom,id = <1>;
315
316 pinctrl-0 = <&rgmii2_pins>;
317 pinctrl-names = "default";
318
319 mtd-mac-address = <&art 6>;
320 };
321
322 &gmac2 {
323 status = "okay";
324 phy-mode = "sgmii";
325 qcom,id = <2>;
326
327 mtd-mac-address = <&art 0>;
328
329 fixed-link {
330 speed = <1000>;
331 full-duplex;
332 };
333 };
334
335 &adm_dma {
336 status = "okay";
337 };