1 #include "qcom-ipq8064-v1.0.dtsi"
4 model = "Qualcomm IPQ8064/DB149";
5 compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
12 reg = <0x41200000 0x300000>;
19 rgmii0_pins: rgmii0_pins {
21 pins = "gpio2", "gpio66";
29 qcom,mode = <GSBI_PROT_I2C_UART>;
31 uart2: serial@12490000 {
37 qcom,mode = <GSBI_PROT_SPI>;
42 spi-max-frequency = <50000000>;
44 pinctrl-0 = <&spi_pins>;
45 pinctrl-names = "default";
47 cs-gpios = <&qcom_pinmux 20 0>;
50 compatible = "s25fl256s1";
53 spi-max-frequency = <50000000>;
58 label = "lowlevel_init";
64 reg = <0x1b0000 0x80000>;
69 reg = <0x230000 0x40000>;
74 reg = <0x270000 0x40000>;
79 reg = <0x2b0000 0x1d50000>;
116 pinctrl-0 = <&mdio0_pins>;
117 pinctrl-names = "default";
119 phy0: ethernet-phy@0 {
121 qca,ar8327-initvals = <
122 0x00004 0x7600000 /* PAD0_MODE */
123 0x00008 0x1000000 /* PAD5_MODE */
124 0x0000c 0x80 /* PAD6_MODE */
125 0x000e4 0x6a545 /* MAC_POWER_SEL */
126 0x000e0 0xc74164de /* SGMII_CTRL */
127 0x0007c 0x4e /* PORT0_STATUS */
128 0x00094 0x4e /* PORT6_STATUS */
132 phy4: ethernet-phy@4 {
136 phy6: ethernet-phy@6 {
140 phy7: ethernet-phy@7 {
149 phy-handle = <&phy4>;
151 pinctrl-0 = <&rgmii0_pins>;
152 pinctrl-names = "default";
170 phy-handle = <&phy6>;
177 phy-handle = <&phy7>;