ipq806x: rework dts to use label
[openwrt/staging/hauke.git] / target / linux / ipq806x / files-5.4 / arch / arm / boot / dts / qcom-ipq8064-wpq864.dts
1 /*
2 * BSD LICENSE
3 *
4 * Copyright (C) 2017 Christian Mehlis <christian@m3hlis.de>
5 * Copyright (C) 2018 Mathias Kresin <dev@kresin.me>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the names of the copyright holders nor the names of any
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include "qcom-ipq8064-v1.0.dtsi"
35
36 #include <dt-bindings/input/input.h>
37 #include <dt-bindings/soc/qcom,tcsr.h>
38
39 / {
40 compatible = "compex,wpq864", "qcom,ipq8064";
41 model = "Compex WPQ864";
42
43 aliases {
44 mdio-gpio0 = &mdio0;
45 serial0 = &gsbi4_serial;
46 ethernet0 = &gmac1;
47 ethernet1 = &gmac0;
48
49 led-boot = &led_pass;
50 led-failsafe = &led_fail;
51 led-running = &led_pass;
52 led-upgrade = &led_pass;
53 };
54
55 chosen {
56 stdout-path = "serial0:115200n8";
57 };
58
59 soc {
60
61 mdio0: mdio@37000000 {
62 #address-cells = <1>;
63 #size-cells = <0>;
64
65 compatible = "qcom,ipq8064-mdio", "syscon";
66 reg = <0x37000000 0x200000>;
67 resets = <&gcc GMAC_CORE1_RESET>;
68 reset-names = "stmmaceth";
69 clocks = <&gcc GMAC_CORE1_CLK>;
70 clock-names = "stmmaceth";
71
72 pinctrl-0 = <&mdio0_pins>;
73 pinctrl-names = "default";
74
75 ethernet-phy@0 {
76 reg = <0>;
77 qca,ar8327-initvals = <
78 0x00004 0x7600000 /* PAD0_MODE */
79 0x00008 0x1000000 /* PAD5_MODE */
80 0x0000c 0x80 /* PAD6_MODE */
81 0x000e4 0x6a545 /* MAC_POWER_SEL */
82 0x000e0 0xc74164de /* SGMII_CTRL */
83 0x0007c 0x4e /* PORT0_STATUS */
84 0x00094 0x4e /* PORT6_STATUS */
85 >;
86 };
87
88 ethernet-phy@4 {
89 reg = <4>;
90 };
91 };
92
93 };
94
95 leds {
96 compatible = "gpio-leds";
97
98 pinctrl-0 = <&led_pins>;
99 pinctrl-names = "default";
100
101 rss4 {
102 label = "wpq864:green:rss4";
103 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
104 };
105
106 rss3 {
107 label = "wpq864:green:rss3";
108 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
109 default-state = "keep";
110 };
111
112 rss2 {
113 label = "wpq864:orange:rss2";
114 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
115 };
116
117 rss1 {
118 label = "wpq864:red:rss1";
119 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
120 };
121
122 led_pass: pass {
123 label = "wpq864:green:pass";
124 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
125 };
126
127 led_fail: fail {
128 label = "wpq864:green:fail";
129 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
130 };
131
132 usb {
133 label = "wpq864:green:usb";
134 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
135 };
136
137 usb-pcie {
138 label = "wpq864:green:usb-pcie";
139 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
140 };
141 };
142
143 keys {
144 compatible = "gpio-keys";
145
146 pinctrl-0 = <&button_pins>;
147 pinctrl-names = "default";
148
149 reset {
150 label = "reset";
151 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
152 linux,code = <KEY_RESTART>;
153 };
154 };
155
156 beeper {
157 compatible = "gpio-beeper";
158
159 pinctrl-0 = <&beeper_pins>;
160 pinctrl-names = "default";
161
162 gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
163 };
164 };
165
166 &rpm {
167 pinctrl-0 = <&rpm_pins>;
168 pinctrl-names = "default";
169 };
170
171 &nand_controller {
172 status = "okay";
173
174 pinctrl-0 = <&nand_pins>;
175 pinctrl-names = "default";
176
177 mt29f2g08abbeah4@0 {
178 compatible = "qcom,nandcs";
179
180 reg = <0>;
181
182 nand-ecc-strength = <4>;
183 nand-bus-width = <8>;
184 nand-ecc-step-size = <512>;
185
186 partitions {
187 compatible = "fixed-partitions";
188 #address-cells = <1>;
189 #size-cells = <1>;
190
191 SBL1@0 {
192 label = "SBL1";
193 reg = <0x0000000 0x0040000>;
194 read-only;
195 };
196
197 MIBIB@40000 {
198 label = "MIBIB";
199 reg = <0x0040000 0x0140000>;
200 read-only;
201 };
202
203 SBL2@180000 {
204 label = "SBL2";
205 reg = <0x0180000 0x0140000>;
206 read-only;
207 };
208
209 SBL3@2c0000 {
210 label = "SBL3";
211 reg = <0x02c0000 0x0280000>;
212 read-only;
213 };
214
215 DDRCONFIG@540000 {
216 label = "DDRCONFIG";
217 reg = <0x0540000 0x0120000>;
218 read-only;
219 };
220
221 SSD@660000 {
222 label = "SSD";
223 reg = <0x0660000 0x0120000>;
224 read-only;
225 };
226
227 TZ@780000 {
228 label = "TZ";
229 reg = <0x0780000 0x0280000>;
230 read-only;
231 };
232
233 RPM@a00000 {
234 label = "RPM";
235 reg = <0x0a00000 0x0280000>;
236 read-only;
237 };
238
239 APPSBL@c80000 {
240 label = "APPSBL";
241 reg = <0x0c80000 0x0500000>;
242 read-only;
243 };
244
245 APPSBLENV@1180000 {
246 label = "APPSBLENV";
247 reg = <0x1180000 0x0080000>;
248 };
249
250 ART@1200000 {
251 label = "ART";
252 reg = <0x1200000 0x0140000>;
253 };
254
255 ubi@1340000 {
256 label = "ubi";
257 reg = <0x1340000 0x4000000>;
258 };
259
260 BOOTCONFIG@5340000 {
261 label = "BOOTCONFIG";
262 reg = <0x5340000 0x0060000>;
263 };
264
265 SBL2-1@53a0000- {
266 label = "SBL2_1";
267 reg = <0x53a0000 0x0140000>;
268 read-only;
269 };
270
271 SBL3-1@54e0000 {
272 label = "SBL3_1";
273 reg = <0x54e0000 0x0280000>;
274 read-only;
275 };
276
277 DDRCONFIG-1@5760000 {
278 label = "DDRCONFIG_1";
279 reg = <0x5760000 0x0120000>;
280 read-only;
281 };
282
283 SSD-1@5880000 {
284 label = "SSD_1";
285 reg = <0x5880000 0x0120000>;
286 read-only;
287 };
288
289 TZ-1@59a0000 {
290 label = "TZ_1";
291 reg = <0x59a0000 0x0280000>;
292 read-only;
293 };
294
295 RPM-1@5c20000 {
296 label = "RPM_1";
297 reg = <0x5c20000 0x0280000>;
298 read-only;
299 };
300
301 BOOTCONFIG1@5ea0000 {
302 label = "BOOTCONFIG1";
303 reg = <0x5ea0000 0x0060000>;
304 };
305
306 APPSBL-1@5f00000 {
307 label = "APPSBL_1";
308 reg = <0x5f00000 0x0500000>;
309 read-only;
310 };
311
312 ubi-1@6400000 {
313 label = "ubi_1";
314 reg = <0x6400000 0x4000000>;
315 };
316
317 unused@a400000 {
318 label = "unused";
319 reg = <0xa400000 0x5c00000>;
320 };
321 };
322 };
323 };
324
325 &adm_dma {
326 status = "okay";
327 };
328
329 &gmac1 {
330 status = "okay";
331
332 pinctrl-0 = <&rgmii2_pins>;
333 pinctrl-names = "default";
334
335 phy-mode = "rgmii";
336 qcom,id = <1>;
337
338 fixed-link {
339 speed = <1000>;
340 full-duplex;
341 };
342 };
343
344 &gmac2 {
345 status = "okay";
346
347 phy-mode = "sgmii";
348 qcom,id = <2>;
349
350 fixed-link {
351 speed = <1000>;
352 full-duplex;
353 };
354 };
355
356 &gsbi4 {
357 status = "okay";
358 qcom,mode = <GSBI_PROT_I2C_UART>;
359 };
360
361 &gsbi4_serial {
362 status = "okay";
363
364 pinctrl-0 = <&uart0_pins>;
365 pinctrl-names = "default";
366 };
367
368 &gsbi5 {
369 status = "okay";
370
371 qcom,mode = <GSBI_PROT_SPI>;
372
373 spi@1a280000 {
374 status = "okay";
375
376 pinctrl-0 = <&spi_pins>;
377 pinctrl-names = "default";
378
379 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
380
381 s25fl256s1@0 {
382 compatible = "jedec,spi-nor";
383 #address-cells = <1>;
384 #size-cells = <1>;
385 reg = <0>;
386 spi-max-frequency = <50000000>;
387 };
388 };
389 };
390
391 &ss_phy_0 { /* USB3 port 0 SS phy */
392 status = "okay";
393
394 rx_eq = <2>;
395 tx_deamp_3_5db = <32>;
396 mpll = <160>;
397 };
398
399 &ss_phy_1 { /* USB3 port 1 SS phy */
400 status = "okay";
401
402 rx_eq = <2>;
403 tx_deamp_3_5db = <32>;
404 mpll = <160>;
405 };
406
407 &pcie0 {
408 status = "okay";
409
410 /delete-property/ pinctrl-0;
411 /delete-property/ pinctrl-names;
412 /delete-property/ perst-gpios;
413 };
414
415 &pcie1 {
416 status = "okay";
417 };
418
419 &pcie2 {
420 status = "okay";
421
422 /delete-property/ pinctrl-0;
423 /delete-property/ pinctrl-names;
424 /delete-property/ perst-gpios;
425 };
426
427 &qcom_pinmux {
428 pinctrl-names = "default";
429 pinctrl-0 = <&state_default>;
430
431 state_default: pinctrl0 {
432 pcie0_pcie2_perst {
433 pins = "gpio3";
434 function = "gpio";
435 drive-strength = <2>;
436 bias-disable;
437 output-high;
438 };
439 };
440
441 led_pins: led_pins {
442 mux {
443 pins = "gpio7", "gpio8", "gpio9", "gpio22",
444 "gpio23", "gpio24", "gpio25", "gpio53";
445 function = "gpio";
446 drive-strength = <2>;
447 bias-pull-up;
448 };
449 };
450
451 button_pins: button_pins {
452 mux {
453 pins = "gpio54";
454 function = "gpio";
455 drive-strength = <2>;
456 bias-pull-up;
457 };
458 };
459
460 beeper_pins: beeper_pins {
461 mux {
462 pins = "gpio55";
463 function = "gpio";
464 drive-strength = <2>;
465 bias-pull-up;
466 };
467 };
468
469 rpm_pins: rpm_pins {
470 mux {
471 pins = "gpio12", "gpio13";
472 function = "gsbi4";
473 drive-strength = <10>;
474 bias-disable;
475 };
476 };
477
478 uart0_pins: uart0_pins {
479 mux {
480 pins = "gpio10", "gpio11";
481 function = "gsbi4";
482 drive-strength = <10>;
483 bias-disable;
484 };
485 };
486
487 spi_pins: spi_pins {
488 mux {
489 pins = "gpio18", "gpio19";
490 function = "gsbi5";
491 drive-strength = <10>;
492 bias-pull-down;
493 };
494
495 clk {
496 pins = "gpio21";
497 function = "gsbi5";
498 drive-strength = <12>;
499 bias-pull-down;
500 };
501
502 cs {
503 pins = "gpio20";
504 function = "gpio";
505 drive-strength = <10>;
506 bias-pull-up;
507 };
508 };
509
510 nand_pins: nand_pins {
511 disable {
512 pins = "gpio34", "gpio35", "gpio36", "gpio37",
513 "gpio38";
514 function = "nand";
515 drive-strength = <10>;
516 bias-disable;
517 };
518
519 pullups {
520 pins = "gpio39";
521 function = "nand";
522 drive-strength = <10>;
523 bias-pull-up;
524 };
525
526 hold {
527 pins = "gpio40", "gpio41", "gpio42", "gpio43",
528 "gpio44", "gpio45", "gpio46", "gpio47";
529 function = "nand";
530 drive-strength = <10>;
531 bias-bus-hold;
532 };
533 };
534
535 mdio0_pins: mdio0_pins {
536 mux {
537 pins = "gpio0", "gpio1";
538 function = "mdio";
539 drive-strength = <8>;
540 bias-disable;
541 };
542 };
543
544 rgmii2_pins: rgmii2_pins {
545 mux {
546 pins = "gpio27", "gpio28", "gpio29", "gpio30",
547 "gpio31", "gpio32", "gpio51", "gpio52",
548 "gpio59", "gpio60", "gpio61", "gpio62";
549 function = "rgmii2";
550 drive-strength = <8>;
551 bias-disable;
552 };
553 };
554 };
555
556 &usb3_0 {
557 status = "okay";
558 };
559
560 &usb3_1 {
561 status = "okay";
562 };
563
564 &tcsr {
565 qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
566 };