1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq8064-v2.0.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
10 model = "Extreme Networks AP3935";
11 compatible = "extreme,ap3935", "qcom,ipq8064";
14 reg = <0x41400000 0x3ec00000>;
15 device_type = "memory";
19 serial0 = &gsbi7_serial;
20 serial1 = &gsbi2_serial;
25 led-boot = &led_power_green;
26 led-failsafe = &led_power_orange;
27 led-running = &led_power_green;
28 led-upgrade = &led_power_green;
32 stdout-path = "serial0:115200n8";
33 bootargs-override = "ubi.block=0,0 root=/dev/ubiblock0_0";
37 compatible = "gpio-keys";
38 pinctrl-0 = <&button_pins>;
39 pinctrl-names = "default";
43 gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
44 linux,code = <KEY_RESTART>;
45 debounce-interval = <60>;
51 compatible = "gpio-leds";
52 pinctrl-0 = <&led_pins>;
53 pinctrl-names = "default";
55 led_power_green: power_green {
56 function = LED_FUNCTION_POWER;
57 color = <LED_COLOR_ID_GREEN>;
58 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
61 led_power_orange: power_orange {
62 function = LED_FUNCTION_POWER;
63 color = <LED_COLOR_ID_ORANGE>;
64 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
68 label = "green:wlan2g";
69 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
70 linux,default-trigger = "phy0tpt";
74 label = "green:wlan5g";
75 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
76 linux,default-trigger = "phy1tpt";
81 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
85 label = "orange:lan1";
86 gpios = <&qcom_pinmux 27 GPIO_ACTIVE_LOW>;
91 gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
95 label = "orange:lan2";
96 gpios = <&qcom_pinmux 29 GPIO_ACTIVE_LOW>;
105 pins = "gpio18", "gpio19";
107 drive-strength = <10>;
114 drive-strength = <12>;
121 drive-strength = <10>;
128 pins = "gpio22", "gpio23", "gpio24", "gpio25",
129 "gpio26", "gpio27", "gpio28", "gpio29";
131 drive-strength = <10>;
136 button_pins: button_pins {
146 qcom,mode = <GSBI_PROT_I2C_UART>;
149 gsbi2_serial: serial@12490000 {
155 qcom,mode = <GSBI_PROT_I2C_UART>;
164 qcom,mode = <GSBI_PROT_I2C_UART>;
167 gsbi7_serial: serial@16640000 {
173 qcom,mode = <GSBI_PROT_SPI>;
178 spi-max-frequency = <50000000>;
180 pinctrl-0 = <&spi_pins>;
181 pinctrl-names = "default";
183 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
186 compatible = "jedec,spi-nor";
187 spi-max-frequency = <50000000>;
191 compatible = "fixed-partitions";
192 #address-cells = <1>;
196 compatible = "u-boot,env-redundant-bool";
198 reg = <0x2a0000 0x0010000>;
201 #nvmem-cell-cells = <1>;
207 reg = <0x2b0000 0x0080000>;
212 reg = <0x330000 0x0010000>;
217 reg = <0x340000 0x0080000>;
222 reg = <0x3c0000 0x0e10000>;
227 reg = <0x11d0000 0x0e10000>;
237 /delete-property/ pinctrl-0;
238 /delete-property/ pinctrl-names;
241 reg = <0x00000000 0 0 0 0>;
242 #address-cells = <3>;
247 compatible = "qcom,ath10k";
249 reg = <0x00010000 0 0 0 0>;
257 /delete-property/ pinctrl-0;
258 /delete-property/ pinctrl-names;
261 reg = <0x00000000 0 0 0 0>;
262 #address-cells = <3>;
267 compatible = "qcom,ath10k";
269 reg = <0x00010000 0 0 0 0>;
277 pinctrl-0 = <&nand_pins>;
278 pinctrl-names = "default";
281 compatible = "qcom,nandcs";
285 nand-ecc-strength = <8>;
286 nand-bus-width = <8>;
287 nand-ecc-step-size = <512>;
290 compatible = "fixed-partitions";
291 #address-cells = <1>;
296 reg = <0x0000000 0x20000000>;
304 compatible = "virtual,mdio-gpio";
305 #address-cells = <1>;
310 pinctrl-0 = <&mdio0_pins>;
311 pinctrl-names = "default";
313 gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
315 phy1: ethernet-phy@1 {
319 phy2: ethernet-phy@2 {
332 phy-handle = <&phy1>;
334 nvmem-cells = <ðaddr 0>;
335 nvmem-cell-names = "mac-address";
350 phy-handle = <&phy2>;
352 nvmem-cells = <ðaddr 1>;
353 nvmem-cell-names = "mac-address";