1 From b5e19b657e352d565c5ddeae5f6dfd542de9d7e5 Mon Sep 17 00:00:00 2001
2 From: Andy Gross <agross@codeaurora.org>
3 Date: Mon, 10 Mar 2014 16:40:19 -0500
4 Subject: [PATCH 044/182] dmaengine: qcom_bam_dma: Add device tree binding
6 Add device tree binding support for the QCOM BAM DMA driver.
8 Acked-by: Kumar Gala <galak@codeaurora.org>
9 Signed-off-by: Andy Gross <agross@codeaurora.org>
10 Signed-off-by: Vinod Koul <vinod.koul@intel.com>
12 .../devicetree/bindings/dma/qcom_bam_dma.txt | 41 ++++++++++++++++++++
13 1 file changed, 41 insertions(+)
14 create mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
17 +++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
19 +QCOM BAM DMA controller
22 +- compatible: must contain "qcom,bam-v1.4.0" for MSM8974
23 +- reg: Address range for DMA registers
24 +- interrupts: Should contain the one interrupt shared by all channels
25 +- #dma-cells: must be <1>, the cell in the dmas property of the client device
26 + represents the channel number
27 +- clocks: required clock
28 +- clock-names: must contain "bam_clk" entry
29 +- qcom,ee : indicates the active Execution Environment identifier (0-7) used in
34 + uart-bam: dma@f9984000 = {
35 + compatible = "qcom,bam-v1.4.0";
36 + reg = <0xf9984000 0x15000>;
37 + interrupts = <0 94 0>;
38 + clocks = <&gcc GCC_BAM_DMA_AHB_CLK>;
39 + clock-names = "bam_clk";
44 +DMA clients must use the format described in the dma.txt file, using a two cell
45 +specifier for each channel.
49 + compatible = "qcom,msm-uart";
50 + reg = <0xf991e000 0x1000>
51 + <0xf9944000 0x19000>;
52 + interrupts = <0 108 0>;
53 + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
54 + <&gcc GCC_BLSP1_AHB_CLK>;
55 + clock-names = "core", "iface";
57 + dmas = <&uart-bam 0>, <&uart-bam 1>;
58 + dma-names = "rx", "tx";