target/linux/ipq806x/patches/0080-clk-qcom-Various-fixes-for-MSM8960-s-global-clock-co.patch

   1 From 7456451e9df88d4c33479e3d4ea124d8a91ceb57 Mon Sep 17 00:00:00 2001
   2 From: Kumar Gala <galak@codeaurora.org>
   3 Date: Fri, 4 Apr 2014 11:32:56 -0500
   4 Subject: [PATCH 080/182] clk: qcom: Various fixes for MSM8960's global clock
   5  controller
   6
   7 * Remove CE2_SLEEP_CLK, doesn't exist on 8960 family SoCs
   8 * Fix incorrect offset for PMIC_SSBI2_RESET
   9 * Fix typo:
  10         SIC_TIC -> SPS_TIC_H
  11         SFAB_ADM0_M2_A_CLK -> SFAB_ADM0_M2_H_CLK
  12 * Fix naming convention:
  13         SFAB_CFPB_S_HCLK -> SFAB_CFPB_S_H_CLK
  14         SATA_SRC_CLK -> SATA_CLK_SRC
  15
  16 Signed-off-by: Kumar Gala <galak@codeaurora.org>
  17 Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
  18 Signed-off-by: Mike Turquette <mturquette@linaro.org>
  19 ---
  20  drivers/clk/qcom/gcc-msm8960.c               |    4 ++--
  21  include/dt-bindings/clock/qcom,gcc-msm8960.h |    7 +++----
  22  include/dt-bindings/reset/qcom,gcc-msm8960.h |    2 +-
  23  3 files changed, 6 insertions(+), 7 deletions(-)
  24
  25 --- a/drivers/clk/qcom/gcc-msm8960.c
  26 +++ b/drivers/clk/qcom/gcc-msm8960.c
  27 @@ -2810,7 +2810,7 @@ static const struct qcom_reset_map gcc_m
  28         [PPSS_PROC_RESET] = { 0x2594, 1 },
  29         [PPSS_RESET] = { 0x2594},
  30         [DMA_BAM_RESET] = { 0x25c0, 7 },
  31 -       [SIC_TIC_RESET] = { 0x2600, 7 },
  32 +       [SPS_TIC_H_RESET] = { 0x2600, 7 },
  33         [SLIMBUS_H_RESET] = { 0x2620, 7 },
  34         [SFAB_CFPB_M_RESET] = { 0x2680, 7 },
  35         [SFAB_CFPB_S_RESET] = { 0x26c0, 7 },
  36 @@ -2823,7 +2823,7 @@ static const struct qcom_reset_map gcc_m
  37         [SFAB_SFPB_M_RESET] = { 0x2780, 7 },
  38         [SFAB_SFPB_S_RESET] = { 0x27a0, 7 },
  39         [RPM_PROC_RESET] = { 0x27c0, 7 },
  40 -       [PMIC_SSBI2_RESET] = { 0x270c, 12 },
  41 +       [PMIC_SSBI2_RESET] = { 0x280c, 12 },
  42         [SDC1_RESET] = { 0x2830 },
  43         [SDC2_RESET] = { 0x2850 },
  44         [SDC3_RESET] = { 0x2870 },
  45 --- a/include/dt-bindings/clock/qcom,gcc-msm8960.h
  46 +++ b/include/dt-bindings/clock/qcom,gcc-msm8960.h
  47 @@ -51,7 +51,7 @@
  48  #define QDSS_TSCTR_CLK                         34
  49  #define SFAB_ADM0_M0_A_CLK                     35
  50  #define SFAB_ADM0_M1_A_CLK                     36
  51 -#define SFAB_ADM0_M2_A_CLK                     37
  52 +#define SFAB_ADM0_M2_H_CLK                     37
  53  #define ADM0_CLK                               38
  54  #define ADM0_PBUS_CLK                          39
  55  #define MSS_XPU_CLK                            40
  56 @@ -99,7 +99,7 @@
  57  #define CFPB2_H_CLK                            82
  58  #define SFAB_CFPB_M_H_CLK                      83
  59  #define CFPB_MASTER_H_CLK                      84
  60 -#define SFAB_CFPB_S_HCLK                       85
  61 +#define SFAB_CFPB_S_H_CLK                      85
  62  #define CFPB_SPLITTER_H_CLK                    86
  63  #define TSIF_H_CLK                             87
  64  #define TSIF_INACTIVITY_TIMERS_CLK             88
  65 @@ -110,7 +110,6 @@
  66  #define CE1_SLEEP_CLK                          93
  67  #define CE2_H_CLK                              94
  68  #define CE2_CORE_CLK                           95
  69 -#define CE2_SLEEP_CLK                          96
  70  #define SFPB_H_CLK_SRC                         97
  71  #define SFPB_H_CLK                             98
  72  #define SFAB_SFPB_M_H_CLK                      99
  73 @@ -252,7 +251,7 @@
  74  #define MSS_S_H_CLK                            235
  75  #define MSS_CXO_SRC_CLK                                236
  76  #define SATA_H_CLK                             237
  77 -#define SATA_SRC_CLK                           238
  78 +#define SATA_CLK_SRC                           238
  79  #define SATA_RXOOB_CLK                         239
  80  #define SATA_PMALIVE_CLK                       240
  81  #define SATA_PHY_REF_CLK                       241
  82 --- a/include/dt-bindings/reset/qcom,gcc-msm8960.h
  83 +++ b/include/dt-bindings/reset/qcom,gcc-msm8960.h
  84 @@ -58,7 +58,7 @@
  85  #define PPSS_PROC_RESET                                        41
  86  #define PPSS_RESET                                     42
  87  #define DMA_BAM_RESET                                  43
  88 -#define SIC_TIC_RESET                                  44
  89 +#define SPS_TIC_H_RESET                                        44
  90  #define SLIMBUS_H_RESET                                        45
  91  #define SFAB_CFPB_M_RESET                              46
  92  #define SFAB_CFPB_S_RESET                              47