target/linux/ipq806x/patches/0167-clk-qcom-Add-HFPLL-driver.patch

   1 From 49134da893bc11e833e3d87139c57e3b84e65219 Mon Sep 17 00:00:00 2001
   2 From: Stephen Boyd <sboyd@codeaurora.org>
   3 Date: Thu, 19 Jun 2014 18:46:31 -0700
   4 Subject: [PATCH 167/182] clk: qcom: Add HFPLL driver
   5
   6 On some devices (MSM8974 for example), the HFPLLs are
   7 instantiated within the Krait processor subsystem as separate
   8 register regions. Add a driver for these PLLs so that we can
   9 provide HFPLL clocks for use by the system.
  10
  11 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  12 ---
  13  drivers/clk/qcom/Kconfig  |    8 ++++
  14  drivers/clk/qcom/Makefile |    1 +
  15  drivers/clk/qcom/hfpll.c  |  110 +++++++++++++++++++++++++++++++++++++++++++++
  16  3 files changed, 119 insertions(+)
  17  create mode 100644 drivers/clk/qcom/hfpll.c
  18
  19 --- a/drivers/clk/qcom/Kconfig
  20 +++ b/drivers/clk/qcom/Kconfig
  21 @@ -53,3 +53,11 @@ config MSM_MMCC_8974
  22           Support for the multimedia clock controller on msm8974 devices.
  23           Say Y if you want to support multimedia devices such as display,
  24           graphics, video encode/decode, camera, etc.
  25 +
  26 +config QCOM_HFPLL
  27 +       tristate "High-Frequency PLL (HFPLL) Clock Controller"
  28 +       depends on COMMON_CLK_QCOM
  29 +       help
  30 +         Support for the high-frequency PLLs present on Qualcomm devices.
  31 +         Say Y if you want to support CPU frequency scaling on devices
  32 +         such as MSM8974, APQ8084, etc.
  33 --- a/drivers/clk/qcom/Makefile
  34 +++ b/drivers/clk/qcom/Makefile
  35 @@ -16,3 +16,4 @@ obj-$(CONFIG_MSM_GCC_8960) += gcc-msm896
  36  obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
  37  obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
  38  obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
  39 +obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
  40 --- /dev/null
  41 +++ b/drivers/clk/qcom/hfpll.c
  42 @@ -0,0 +1,110 @@
  43 +/*
  44 + * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
  45 + *
  46 + * This program is free software; you can redistribute it and/or modify
  47 + * it under the terms of the GNU General Public License version 2 and
  48 + * only version 2 as published by the Free Software Foundation.
  49 + *
  50 + * This program is distributed in the hope that it will be useful,
  51 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  52 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  53 + * GNU General Public License for more details.
  54 + */
  55 +
  56 +#include <linux/kernel.h>
  57 +#include <linux/init.h>
  58 +#include <linux/module.h>
  59 +#include <linux/platform_device.h>
  60 +#include <linux/of.h>
  61 +#include <linux/clk.h>
  62 +#include <linux/clk-provider.h>
  63 +#include <linux/regmap.h>
  64 +
  65 +#include "clk-regmap.h"
  66 +#include "clk-hfpll.h"
  67 +
  68 +static const struct hfpll_data hdata = {
  69 +       .mode_reg = 0x00,
  70 +       .l_reg = 0x04,
  71 +       .m_reg = 0x08,
  72 +       .n_reg = 0x0c,
  73 +       .user_reg = 0x10,
  74 +       .config_reg = 0x14,
  75 +       .config_val = 0x430405d,
  76 +       .status_reg = 0x1c,
  77 +       .lock_bit = 16,
  78 +
  79 +       .user_val = 0x8,
  80 +       .user_vco_mask = 0x100000,
  81 +       .low_vco_max_rate = 1248000000,
  82 +       .min_rate = 537600000UL,
  83 +       .max_rate = 2900000000UL,
  84 +};
  85 +
  86 +static const struct of_device_id qcom_hfpll_match_table[] = {
  87 +       { .compatible = "qcom,hfpll" },
  88 +       { }
  89 +};
  90 +MODULE_DEVICE_TABLE(of, qcom_hfpll_match_table);
  91 +
  92 +static struct regmap_config hfpll_regmap_config = {
  93 +       .reg_bits       = 32,
  94 +       .reg_stride     = 4,
  95 +       .val_bits       = 32,
  96 +       .max_register   = 0x30,
  97 +       .fast_io        = true,
  98 +};
  99 +
 100 +static int qcom_hfpll_probe(struct platform_device *pdev)
 101 +{
 102 +       struct clk *clk;
 103 +       struct resource *res;
 104 +       struct device *dev = &pdev->dev;
 105 +       void __iomem *base;
 106 +       struct regmap *regmap;
 107 +       struct clk_hfpll *h;
 108 +       struct clk_init_data init = {
 109 +               .parent_names = (const char *[]){ "xo" },
 110 +               .num_parents = 1,
 111 +               .ops = &clk_ops_hfpll,
 112 +       };
 113 +
 114 +       h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);
 115 +       if (!h)
 116 +               return -ENOMEM;
 117 +
 118 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 119 +       base = devm_ioremap_resource(dev, res);
 120 +       if (IS_ERR(base))
 121 +               return PTR_ERR(base);
 122 +
 123 +       regmap = devm_regmap_init_mmio(&pdev->dev, base, &hfpll_regmap_config);
 124 +       if (IS_ERR(regmap))
 125 +               return PTR_ERR(regmap);
 126 +
 127 +       if (of_property_read_string_index(dev->of_node, "clock-output-names",
 128 +                                                 0, &init.name))
 129 +               return -ENODEV;
 130 +
 131 +       h->d = &hdata;
 132 +       h->clkr.hw.init = &init;
 133 +       spin_lock_init(&h->lock);
 134 +
 135 +       clk = devm_clk_register_regmap(&pdev->dev, &h->clkr);
 136 +
 137 +       return PTR_ERR_OR_ZERO(clk);
 138 +}
 139 +
 140 +static struct platform_driver qcom_hfpll_driver = {
 141 +       .probe          = qcom_hfpll_probe,
 142 +       .driver         = {
 143 +               .name   = "qcom-hfpll",
 144 +               .owner  = THIS_MODULE,
 145 +               .of_match_table = qcom_hfpll_match_table,
 146 +       },
 147 +};
 148 +module_platform_driver(qcom_hfpll_driver);
 149 +
 150 +MODULE_DESCRIPTION("QCOM HFPLL Clock Driver");
 151 +MODULE_LICENSE("GPL v2");
 152 +MODULE_ALIAS("platform:qcom-hfpll");