1 From 0a38d7a21ef0e851d025e4e16f096d5579226299 Mon Sep 17 00:00:00 2001
2 From: Stephen Boyd <sboyd@codeaurora.org>
3 Date: Mon, 16 Jun 2014 17:44:08 -0700
4 Subject: [PATCH 168/182] clk: qcom: Add MSM8960's HFPLLs
6 Describe the HFPLLs present on MSM8960 devices.
8 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
10 drivers/clk/qcom/gcc-msm8960.c | 82 ++++++++++++++++++++++++++++++++++++++++
11 1 file changed, 82 insertions(+)
13 diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
14 index f4ffd91..d04fc99 100644
15 --- a/drivers/clk/qcom/gcc-msm8960.c
16 +++ b/drivers/clk/qcom/gcc-msm8960.c
20 #include "clk-branch.h"
21 +#include "clk-hfpll.h"
24 static struct clk_pll pll3 = {
25 @@ -75,6 +76,84 @@ static struct clk_regmap pll8_vote = {
29 +static struct hfpll_data hfpll0_data = {
34 + .config_reg = 0x3204,
35 + .status_reg = 0x321c,
36 + .config_val = 0x7845c665,
37 + .droop_reg = 0x3214,
38 + .droop_val = 0x0108c000,
39 + .min_rate = 600000000UL,
40 + .max_rate = 1800000000UL,
43 +static struct clk_hfpll hfpll0 = {
45 + .clkr.hw.init = &(struct clk_init_data){
46 + .parent_names = (const char *[]){ "pxo" },
49 + .ops = &clk_ops_hfpll,
50 + .flags = CLK_IGNORE_UNUSED,
52 + .lock = __SPIN_LOCK_UNLOCKED(hfpll0.lock),
55 +static struct hfpll_data hfpll1_data = {
60 + .config_reg = 0x3304,
61 + .status_reg = 0x331c,
62 + .config_val = 0x7845c665,
63 + .droop_reg = 0x3314,
64 + .droop_val = 0x0108c000,
65 + .min_rate = 600000000UL,
66 + .max_rate = 1800000000UL,
69 +static struct clk_hfpll hfpll1 = {
71 + .clkr.hw.init = &(struct clk_init_data){
72 + .parent_names = (const char *[]){ "pxo" },
75 + .ops = &clk_ops_hfpll,
76 + .flags = CLK_IGNORE_UNUSED,
78 + .lock = __SPIN_LOCK_UNLOCKED(hfpll1.lock),
81 +static struct hfpll_data hfpll_l2_data = {
86 + .config_reg = 0x3404,
87 + .status_reg = 0x341c,
88 + .config_val = 0x7845c665,
89 + .droop_reg = 0x3414,
90 + .droop_val = 0x0108c000,
91 + .min_rate = 600000000UL,
92 + .max_rate = 1800000000UL,
95 +static struct clk_hfpll hfpll_l2 = {
96 + .d = &hfpll_l2_data,
97 + .clkr.hw.init = &(struct clk_init_data){
98 + .parent_names = (const char *[]){ "pxo" },
100 + .name = "hfpll_l2",
101 + .ops = &clk_ops_hfpll,
102 + .flags = CLK_IGNORE_UNUSED,
104 + .lock = __SPIN_LOCK_UNLOCKED(hfpll_l2.lock),
107 static struct clk_pll pll14 = {
110 @@ -2763,6 +2842,9 @@ static struct clk_regmap *gcc_msm8960_clks[] = {
111 [PMIC_ARB1_H_CLK] = &pmic_arb1_h_clk.clkr,
112 [PMIC_SSBI2_CLK] = &pmic_ssbi2_clk.clkr,
113 [RPM_MSG_RAM_H_CLK] = &rpm_msg_ram_h_clk.clkr,
114 + [PLL9] = &hfpll0.clkr,
115 + [PLL10] = &hfpll1.clkr,
116 + [PLL12] = &hfpll_l2.clkr,
119 static const struct qcom_reset_map gcc_msm8960_resets[] = {