1 From 67a9d5a02b178644da624ef9c32b4e6abb2c4f6e Mon Sep 17 00:00:00 2001
2 From: Stephen Boyd <sboyd@codeaurora.org>
3 Date: Wed, 18 Jun 2014 14:25:41 -0700
4 Subject: [PATCH 170/182] clk: qcom: Add KPSS ACC/GCC driver
6 The ACC and GCC regions present in KPSSv1 contain registers to
7 control clocks and power to each Krait CPU and L2. For CPUfreq
8 purposes probe these devices and expose a mux clock that chooses
11 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
13 drivers/clk/qcom/Kconfig | 8 +++
14 drivers/clk/qcom/Makefile | 1 +
15 drivers/clk/qcom/kpss-xcc.c | 115 +++++++++++++++++++++++++++++++++++++++++++
16 3 files changed, 124 insertions(+)
17 create mode 100644 drivers/clk/qcom/kpss-xcc.c
19 diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
20 index 70b6a7c..e9e5360 100644
21 --- a/drivers/clk/qcom/Kconfig
22 +++ b/drivers/clk/qcom/Kconfig
23 @@ -62,6 +62,14 @@ config QCOM_HFPLL
24 Say Y if you want to support CPU frequency scaling on devices
25 such as MSM8974, APQ8084, etc.
28 + tristate "KPSS Clock Controller"
29 + depends on COMMON_CLK_QCOM
31 + Support for the Krait ACC and GCC clock controllers. Say Y
32 + if you want to support CPU frequency scaling on devices such
33 + as MSM8960, APQ8064, etc.
37 select KRAIT_L2_ACCESSORS
38 diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
39 index 6482165..29b2a45 100644
40 --- a/drivers/clk/qcom/Makefile
41 +++ b/drivers/clk/qcom/Makefile
42 @@ -17,4 +17,5 @@ obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o
43 obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
44 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
45 obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
46 +obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
47 obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
48 diff --git a/drivers/clk/qcom/kpss-xcc.c b/drivers/clk/qcom/kpss-xcc.c
50 index 0000000..1061668
52 +++ b/drivers/clk/qcom/kpss-xcc.c
54 +/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
56 + * This program is free software; you can redistribute it and/or modify
57 + * it under the terms of the GNU General Public License version 2 and
58 + * only version 2 as published by the Free Software Foundation.
60 + * This program is distributed in the hope that it will be useful,
61 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
62 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
63 + * GNU General Public License for more details.
66 +#include <linux/kernel.h>
67 +#include <linux/init.h>
68 +#include <linux/module.h>
69 +#include <linux/platform_device.h>
70 +#include <linux/err.h>
71 +#include <linux/io.h>
72 +#include <linux/of.h>
73 +#include <linux/of_device.h>
74 +#include <linux/clk.h>
75 +#include <linux/clk-provider.h>
76 +#include <linux/clk/msm-clk-generic.h>
78 +static int kpss_xcc_set_mux_sel(struct mux_clk *clk, int sel)
80 + writel_relaxed(sel, clk->base + clk->offset);
84 +static int kpss_xcc_get_mux_sel(struct mux_clk *clk)
86 + return readl_relaxed(clk->base + clk->offset);
89 +static const struct clk_mux_ops kpss_xcc_ops = {
90 + .set_mux_sel = kpss_xcc_set_mux_sel,
91 + .get_mux_sel = kpss_xcc_get_mux_sel,
94 +static const char *aux_parents[] = {
99 +static u8 aux_parent_map[] = {
104 +static const struct of_device_id kpss_xcc_match_table[] = {
105 + { .compatible = "qcom,kpss-acc-v1", .data = (void *)1UL },
106 + { .compatible = "qcom,kpss-gcc" },
109 +MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
111 +static int kpss_xcc_driver_probe(struct platform_device *pdev)
113 + const struct of_device_id *id;
115 + struct resource *res;
116 + void __iomem *base;
117 + struct mux_clk *mux_clk;
118 + struct clk_init_data init = {
119 + .parent_names = aux_parents,
121 + .ops = &clk_ops_gen_mux,
124 + id = of_match_device(kpss_xcc_match_table, &pdev->dev);
128 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
129 + base = devm_ioremap_resource(&pdev->dev, res);
131 + return PTR_ERR(base);
133 + mux_clk = devm_kzalloc(&pdev->dev, sizeof(*mux_clk), GFP_KERNEL);
137 + mux_clk->mask = 0x3;
138 + mux_clk->parent_map = aux_parent_map;
139 + mux_clk->ops = &kpss_xcc_ops;
140 + mux_clk->base = base;
141 + mux_clk->hw.init = &init;
144 + if (of_property_read_string_index(pdev->dev.of_node,
145 + "clock-output-names", 0, &init.name))
147 + mux_clk->offset = 0x14;
149 + init.name = "acpu_l2_aux";
150 + mux_clk->offset = 0x28;
153 + clk = devm_clk_register(&pdev->dev, &mux_clk->hw);
155 + return PTR_ERR_OR_ZERO(clk);
158 +static struct platform_driver kpss_xcc_driver = {
159 + .probe = kpss_xcc_driver_probe,
161 + .name = "kpss-xcc",
162 + .of_match_table = kpss_xcc_match_table,
163 + .owner = THIS_MODULE,
166 +module_platform_driver(kpss_xcc_driver);
168 +MODULE_LICENSE("GPL v2");