target/linux/ipq806x/patches/0175-ARM-dts-ipq8064-Add-necessary-DT-data-for-Krait-cpuf.patch

   1 From 258a3ea23ec048603debe1621c681b0cc733f236 Mon Sep 17 00:00:00 2001
   2 From: Stephen Boyd <sboyd@codeaurora.org>
   3 Date: Wed, 18 Jun 2014 16:04:37 -0700
   4 Subject: [PATCH 175/182] ARM: dts: ipq8064: Add necessary DT data for Krait
   5  cpufreq
   6
   7 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
   8 ---
   9  arch/arm/boot/dts/qcom-ipq8064.dtsi |   45 +++++++++++++++++++++++++++++++++++
  10  1 file changed, 45 insertions(+)
  11
  12 diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
  13 index 6be6ac9..97e4c3d 100644
  14 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
  15 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
  16 @@ -23,6 +23,22 @@
  17                         next-level-cache = <&L2>;
  18                         qcom,acc = <&acc0>;
  19                         qcom,saw = <&saw0>;
  20 +                       clocks = <&kraitcc 0>;
  21 +                       clock-names = "cpu";
  22 +                       operating-points = <
  23 +                               /* kHz    ignored */
  24 +                               1400000 1000000
  25 +                               1200000 1000000
  26 +                               1000000 1000000
  27 +                                800000 1000000
  28 +                                600000 1000000
  29 +                                384000 1000000
  30 +                       >;
  31 +                       clock-latency = <100000>;
  32 +
  33 +                       cooling-min-state = <0>;
  34 +                       cooling-max-state = <10>;
  35 +                       #cooling-cells = <2>;
  36                 };
  37
  38                 cpu@1 {
  39 @@ -33,6 +49,22 @@
  40                         next-level-cache = <&L2>;
  41                         qcom,acc = <&acc1>;
  42                         qcom,saw = <&saw1>;
  43 +                       clocks = <&kraitcc 1>;
  44 +                       clock-names = "cpu";
  45 +                       operating-points = <
  46 +                               /* kHz    ignored */
  47 +                               1400000 1000000
  48 +                               1200000 1000000
  49 +                               1000000 1000000
  50 +                                800000 1000000
  51 +                                600000 1000000
  52 +                                384000 1000000
  53 +                       >;
  54 +                       clock-latency = <100000>;
  55 +
  56 +                       cooling-min-state = <0>;
  57 +                       cooling-max-state = <10>;
  58 +                       #cooling-cells = <2>;
  59                 };
  60
  61                 L2: l2-cache {
  62 @@ -46,6 +78,11 @@
  63                 interrupts = <1 10 0x304>;
  64         };
  65
  66 +       kraitcc: clock-controller {
  67 +               compatible = "qcom,krait-cc-v1";
  68 +               #clock-cells = <1>;
  69 +       };
  70 +
  71         reserved-memory {
  72                 #address-cells = <1>;
  73                 #size-cells = <1>;
  74 @@ -102,11 +139,19 @@
  75                 acc0: clock-controller@2088000 {
  76                         compatible = "qcom,kpss-acc-v1";
  77                         reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
  78 +                       clock-output-names = "acpu0_aux";
  79                 };
  80
  81                 acc1: clock-controller@2098000 {
  82                         compatible = "qcom,kpss-acc-v1";
  83                         reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
  84 +                       clock-output-names = "acpu1_aux";
  85 +               };
  86 +
  87 +               l2cc: clock-controller@2011000 {
  88 +                       compatible = "qcom,kpss-gcc";
  89 +                       reg = <0x2011000 0x1000>;
  90 +                       clock-output-names = "acpu_l2_aux";
  91                 };
  92
  93                 saw0: regulator@2089000 {
  94 --
  95 1.7.10.4
  96