1 --- a/arch/arm/boot/dts/Makefile 2015-09-22 18:30:09.033530282 +0530
2 +++ b/arch/arm/boot/dts/Makefile 2015-09-23 17:06:44.892947581 +0530
4 qcom-ipq8064-ap148.dtb \
5 qcom-ipq8064-db149.dtb \
6 qcom-ipq8064-r7500.dtb \
7 + qcom-ipq8064-d7800.dtb \
8 qcom-msm8660-surf.dtb \
10 qcom-msm8974-sony-xperia-honami.dtb
11 --- a/arch/arm/boot/dts/qcom-ipq8064-d7800.dts 1970-01-01 05:30:00.000000000 +0530
12 +++ b/arch/arm/boot/dts/qcom-ipq8064-d7800.dts 2015-09-23 17:06:45.336947567 +0530
14 +#include "qcom-ipq8064-v1.0.dtsi"
16 +#include <dt-bindings/input/input.h>
19 + model = "Netgear Nighthawk X4 D7800";
20 + compatible = "netgear,d7800", "qcom,ipq8064";
23 + reg = <0x42000000 0xe000000>;
24 + device_type = "memory";
28 + #address-cells = <1>;
32 + reg = <0x41200000 0x300000>;
39 + mdio-gpio0 = &mdio0;
43 + bootargs = "rootfstype=squashfs noinitrd";
44 + linux,stdout-path = "serial0:115200n8";
49 + i2c4_pins: i2c4_pinmux {
50 + pins = "gpio12", "gpio13";
55 + pcie0_pins: pcie0_pinmux {
58 + function = "pcie1_rst";
59 + drive-strength = <12>;
64 + pcie1_pins: pcie1_pinmux {
67 + function = "pcie2_rst";
68 + drive-strength = <12>;
73 + nand_pins: nand_pins {
75 + pins = "gpio34", "gpio35", "gpio36",
76 + "gpio37", "gpio38", "gpio39",
77 + "gpio40", "gpio41", "gpio42",
78 + "gpio43", "gpio44", "gpio45",
81 + drive-strength = <10>;
89 + pins = "gpio40", "gpio41", "gpio42",
90 + "gpio43", "gpio44", "gpio45",
96 + mdio0_pins: mdio0_pins {
98 + pins = "gpio0", "gpio1";
100 + drive-strength = <8>;
105 + rgmii2_pins: rgmii2_pins {
107 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
108 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
109 + function = "rgmii2";
110 + drive-strength = <8>;
117 + qcom,mode = <GSBI_PROT_I2C_UART>;
123 + * The i2c device on gsbi4 should not be enabled.
124 + * On ipq806x designs gsbi4 i2c is meant for exclusive
125 + * RPM usage. Turning this on in kernel manifests as
126 + * i2c failure for the RPM.
130 + sata-phy@1b400000 {
138 + phy@100f8800 { /* USB3 port 1 HS phy */
142 + phy@100f8830 { /* USB3 port 1 SS phy */
146 + phy@110f8800 { /* USB3 port 0 HS phy */
150 + phy@110f8830 { /* USB3 port 0 SS phy */
162 + pcie0: pci@1b500000 {
164 + reset-gpio = <&qcom_pinmux 3 0>;
165 + pinctrl-0 = <&pcie0_pins>;
166 + pinctrl-names = "default";
169 + pcie1: pci@1b700000 {
171 + reset-gpio = <&qcom_pinmux 48 0>;
172 + pinctrl-0 = <&pcie1_pins>;
173 + pinctrl-names = "default";
179 + pinctrl-0 = <&nand_pins>;
180 + pinctrl-names = "default";
182 + nand-ecc-strength = <4>;
183 + nand-bus-width = <8>;
185 + #address-cells = <1>;
190 + reg = <0x0000000 0x0c80000>;
196 + reg = <0x0c80000 0x0500000>;
200 + APPSBLENV@1180000 {
201 + label = "APPSBLENV";
202 + reg = <0x1180000 0x0080000>;
208 + reg = <0x1200000 0x0140000>;
212 + artbak: art@1340000 {
214 + reg = <0x1340000 0x0140000>;
220 + reg = <0x1480000 0x0200000>;
225 + reg = <0x1680000 0x1E00000>;
230 + reg = <0x3480000 0x4480000>;
236 + reg = <0x7900000 0x0700000>;
241 + label = "firmware";
242 + reg = <0x1480000 0x2000000>;
248 + compatible = "virtual,mdio-gpio";
249 + #address-cells = <1>;
251 + gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
252 + pinctrl-0 = <&mdio0_pins>;
253 + pinctrl-names = "default";
255 + phy0: ethernet-phy@0 {
256 + device_type = "ethernet-phy";
258 + qca,ar8327-initvals = <
259 + 0x00004 0x7600000 /* PAD0_MODE */
260 + 0x00008 0x1000000 /* PAD5_MODE */
261 + 0x0000c 0x80 /* PAD6_MODE */
262 + 0x000e4 0xaa545 /* MAC_POWER_SEL */
263 + 0x000e0 0xc74164de /* SGMII_CTRL */
264 + 0x0007c 0x4e /* PORT0_STATUS */
265 + 0x00094 0x4e /* PORT6_STATUS */
269 + phy4: ethernet-phy@4 {
270 + device_type = "ethernet-phy";
275 + gmac1: ethernet@37200000 {
277 + phy-mode = "rgmii";
278 + phy-handle = <&phy4>;
281 + pinctrl-0 = <&rgmii2_pins>;
282 + pinctrl-names = "default";
284 + mtd-mac-address = <&art 6>;
287 + gmac2: ethernet@37400000 {
289 + phy-mode = "sgmii";
292 + mtd-mac-address = <&art 0>;
302 + compatible = "gpio-keys";
306 + gpios = <&qcom_pinmux 6 1>;
307 + linux,code = <KEY_WLAN>;
312 + gpios = <&qcom_pinmux 54 1>;
313 + linux,code = <KEY_RESTART>;
318 + gpios = <&qcom_pinmux 65 1>;
319 + linux,code = <KEY_WPS_BUTTON>;
324 + compatible = "gpio-leds";
327 + label = "d7800:amber:usb1";
328 + gpios = <&qcom_pinmux 7 0>;
332 + label = "d7800:amber:usb3";
333 + gpios = <&qcom_pinmux 8 0>;
337 + label = "d7800:amber:status";
338 + gpios = <&qcom_pinmux 9 0>;
342 + label = "d7800:white:internet";
343 + gpios = <&qcom_pinmux 22 0>;
347 + label = "d7800:white:wan";
348 + gpios = <&qcom_pinmux 23 0>;
352 + label = "d7800:white:wps";
353 + gpios = <&qcom_pinmux 24 0>;
357 + label = "d7800:white:esata";
358 + gpios = <&qcom_pinmux 26 0>;
362 + label = "d7800:white:power";
363 + gpios = <&qcom_pinmux 53 0>;
364 + default-state = "on";
368 + label = "d7800:white:rfkill";
369 + gpios = <&qcom_pinmux 64 0>;
373 + label = "d7800:white:wifi5g";
374 + gpios = <&qcom_pinmux 67 0>;