ipq806x: refresh 4.19 patches
[openwrt/staging/stintel.git] / target / linux / ipq806x / patches-4.19 / 0034-0001-ARM-Add-Krait-L2-register-accessor-functions.patch
1 From 36d68f64c411e09788687d5919886aadeb92adca Mon Sep 17 00:00:00 2001
2 From: Stephen Boyd <sboyd@codeaurora.org>
3 Date: Tue, 14 Aug 2018 17:42:20 +0530
4 Subject: [PATCH 01/12] ARM: Add Krait L2 register accessor functions
5
6 Krait CPUs have a handful of L2 cache controller registers that
7 live behind a cp15 based indirection register. First you program
8 the indirection register (l2cpselr) to point the L2 'window'
9 register (l2cpdr) at what you want to read/write. Then you
10 read/write the 'window' register to do what you want. The
11 l2cpselr register is not banked per-cpu so we must lock around
12 accesses to it to prevent other CPUs from re-pointing l2cpdr
13 underneath us.
14
15 Cc: Mark Rutland <mark.rutland@arm.com>
16 Cc: Russell King <linux@arm.linux.org.uk>
17 Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
18 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
19 Signed-off-by: Sricharan R <sricharan@codeaurora.org>
20 Tested-by: Craig Tatlor <ctatlor97@gmail.com>
21 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
22 ---
23 arch/arm/common/Kconfig | 3 ++
24 arch/arm/common/Makefile | 1 +
25 arch/arm/common/krait-l2-accessors.c | 48 +++++++++++++++++++++++
26 arch/arm/include/asm/krait-l2-accessors.h | 9 +++++
27 4 files changed, 61 insertions(+)
28 create mode 100644 arch/arm/common/krait-l2-accessors.c
29 create mode 100644 arch/arm/include/asm/krait-l2-accessors.h
30
31 --- a/arch/arm/common/Kconfig
32 +++ b/arch/arm/common/Kconfig
33 @@ -7,6 +7,9 @@ config DMABOUNCE
34 bool
35 select ZONE_DMA
36
37 +config KRAIT_L2_ACCESSORS
38 + bool
39 +
40 config SHARP_LOCOMO
41 bool
42
43 --- a/arch/arm/common/Makefile
44 +++ b/arch/arm/common/Makefile
45 @@ -7,6 +7,7 @@ obj-y += firmware.o
46
47 obj-$(CONFIG_SA1111) += sa1111.o
48 obj-$(CONFIG_DMABOUNCE) += dmabounce.o
49 +obj-$(CONFIG_KRAIT_L2_ACCESSORS) += krait-l2-accessors.o
50 obj-$(CONFIG_SHARP_LOCOMO) += locomo.o
51 obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
52 obj-$(CONFIG_SHARP_SCOOP) += scoop.o
53 --- /dev/null
54 +++ b/arch/arm/common/krait-l2-accessors.c
55 @@ -0,0 +1,48 @@
56 +// SPDX-License-Identifier: GPL-2.0
57 +// Copyright (c) 2018, The Linux Foundation. All rights reserved.
58 +
59 +#include <linux/spinlock.h>
60 +#include <linux/export.h>
61 +
62 +#include <asm/barrier.h>
63 +#include <asm/krait-l2-accessors.h>
64 +
65 +static DEFINE_RAW_SPINLOCK(krait_l2_lock);
66 +
67 +void krait_set_l2_indirect_reg(u32 addr, u32 val)
68 +{
69 + unsigned long flags;
70 +
71 + raw_spin_lock_irqsave(&krait_l2_lock, flags);
72 + /*
73 + * Select the L2 window by poking l2cpselr, then write to the window
74 + * via l2cpdr.
75 + */
76 + asm volatile ("mcr p15, 3, %0, c15, c0, 6 @ l2cpselr" : : "r" (addr));
77 + isb();
78 + asm volatile ("mcr p15, 3, %0, c15, c0, 7 @ l2cpdr" : : "r" (val));
79 + isb();
80 +
81 + raw_spin_unlock_irqrestore(&krait_l2_lock, flags);
82 +}
83 +EXPORT_SYMBOL(krait_set_l2_indirect_reg);
84 +
85 +u32 krait_get_l2_indirect_reg(u32 addr)
86 +{
87 + u32 val;
88 + unsigned long flags;
89 +
90 + raw_spin_lock_irqsave(&krait_l2_lock, flags);
91 + /*
92 + * Select the L2 window by poking l2cpselr, then read from the window
93 + * via l2cpdr.
94 + */
95 + asm volatile ("mcr p15, 3, %0, c15, c0, 6 @ l2cpselr" : : "r" (addr));
96 + isb();
97 + asm volatile ("mrc p15, 3, %0, c15, c0, 7 @ l2cpdr" : "=r" (val));
98 +
99 + raw_spin_unlock_irqrestore(&krait_l2_lock, flags);
100 +
101 + return val;
102 +}
103 +EXPORT_SYMBOL(krait_get_l2_indirect_reg);
104 --- /dev/null
105 +++ b/arch/arm/include/asm/krait-l2-accessors.h
106 @@ -0,0 +1,9 @@
107 +/* SPDX-License-Identifier: GPL-2.0 */
108 +
109 +#ifndef __ASMARM_KRAIT_L2_ACCESSORS_H
110 +#define __ASMARM_KRAIT_L2_ACCESSORS_H
111 +
112 +extern void krait_set_l2_indirect_reg(u32 addr, u32 val);
113 +extern u32 krait_get_l2_indirect_reg(u32 addr);
114 +
115 +#endif