1 From 490d103232287eb51c92c49a4ef8865fd0a9d59e Mon Sep 17 00:00:00 2001
2 From: Sham Muthayyan <smuthayy@codeaurora.org>
3 Date: Tue, 19 Jul 2016 18:58:18 +0530
4 Subject: PCI: qcom: Fixed IPQ806x PCIE reset changes
6 Change-Id: Ia6590e960b9754b1e8b7a51f318788cd63e9e321
7 Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
10 --- a/drivers/pci/controller/dwc/pcie-qcom.c
11 +++ b/drivers/pci/controller/dwc/pcie-qcom.c
12 @@ -92,6 +92,7 @@ struct qcom_pcie_resources_2_1_0 {
13 struct reset_control *ahb_reset;
14 struct reset_control *por_reset;
15 struct reset_control *phy_reset;
16 + struct reset_control *ext_reset;
17 struct regulator_bulk_data supplies[QCOM_PCIE_2_1_0_MAX_SUPPLY];
20 @@ -261,6 +262,10 @@ static int qcom_pcie_get_resources_2_1_0
21 if (IS_ERR(res->por_reset))
22 return PTR_ERR(res->por_reset);
24 + res->ext_reset = devm_reset_control_get(dev, "ext");
25 + if (IS_ERR(res->ext_reset))
26 + return PTR_ERR(res->ext_reset);
28 res->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
29 return PTR_ERR_OR_ZERO(res->phy_reset);
31 @@ -274,6 +279,7 @@ static void qcom_pcie_deinit_2_1_0(struc
32 reset_control_assert(res->ahb_reset);
33 reset_control_assert(res->por_reset);
34 reset_control_assert(res->pci_reset);
35 + reset_control_assert(res->ext_reset);
36 clk_disable_unprepare(res->iface_clk);
37 clk_disable_unprepare(res->core_clk);
38 clk_disable_unprepare(res->phy_clk);
39 @@ -290,15 +296,21 @@ static int qcom_pcie_init_2_1_0(struct q
43 + ret = reset_control_assert(res->ahb_reset);
45 + dev_err(dev, "cannot assert ahb reset\n");
49 ret = regulator_bulk_enable(ARRAY_SIZE(res->supplies), res->supplies);
51 dev_err(dev, "cannot enable regulators\n");
55 - ret = reset_control_assert(res->ahb_reset);
56 + ret = reset_control_deassert(res->ext_reset);
58 - dev_err(dev, "cannot assert ahb reset\n");
59 + dev_err(dev, "cannot assert ext reset\n");