1 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
2 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
4 next-level-cache = <&L2>;
7 + clocks = <&kraitcc 0>, <&kraitcc 4>;
8 + clock-names = "cpu", "l2";
9 + clock-latency = <100000>;
10 + cpu-supply = <&smb208_s2a>;
11 + voltage-tolerance = <5>;
16 next-level-cache = <&L2>;
19 + clocks = <&kraitcc 1>, <&kraitcc 4>;
20 + clock-names = "cpu", "l2";
21 + clock-latency = <100000>;
22 + cpu-supply = <&smb208_s2b>;
31 + qcom,l2-rates = <384000000 1000000000 1200000000>;
40 + kraitcc: clock-controller {
41 + compatible = "qcom,krait-cc-v1";
47 + qcom,speed0-pvs0-bin-v0 =
48 + < 1400000000 1250000 >,
49 + < 1200000000 1200000 >,
50 + < 1000000000 1150000 >,
51 + < 800000000 1100000 >,
52 + < 600000000 1050000 >,
53 + < 384000000 1000000 >;
55 + qcom,speed0-pvs1-bin-v0 =
56 + < 1400000000 1175000 >,
57 + < 1200000000 1125000 >,
58 + < 1000000000 1075000 >,
59 + < 800000000 1025000 >,
60 + < 600000000 975000 >,
61 + < 384000000 925000 >;
63 + qcom,speed0-pvs2-bin-v0 =
64 + < 1400000000 1125000 >,
65 + < 1200000000 1075000 >,
66 + < 1000000000 1025000 >,
67 + < 800000000 995000 >,
68 + < 600000000 925000 >,
69 + < 384000000 875000 >;
71 + qcom,speed0-pvs3-bin-v0 =
72 + < 1400000000 1050000 >,
73 + < 1200000000 1000000 >,
74 + < 1000000000 950000 >,
75 + < 800000000 900000 >,
76 + < 600000000 850000 >,
77 + < 384000000 800000 >;
84 acc0: clock-controller@2088000 {
85 compatible = "qcom,kpss-acc-v1";
86 reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
87 + clock-output-names = "acpu0_aux";
90 acc1: clock-controller@2098000 {
91 compatible = "qcom,kpss-acc-v1";
92 reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
93 + clock-output-names = "acpu1_aux";
96 l2cc: clock-controller@2011000 {