1 From 16d2871830ff3fe12a6bff582549a9264adff278 Mon Sep 17 00:00:00 2001
2 From: Ram Chandra Jangir <rjangi@codeaurora.org>
3 Date: Tue, 10 May 2016 20:19:31 +0530
4 Subject: [PATCH] spi: qup: Fix fifo and dma support for IPQ806x
6 Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
8 drivers/spi/spi-qup.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++--
9 1 file changed, 52 insertions(+), 2 deletions(-)
11 --- a/drivers/spi/spi-qup.c
12 +++ b/drivers/spi/spi-qup.c
14 #include <linux/spi/spi.h>
15 #include <linux/dmaengine.h>
16 #include <linux/dma-mapping.h>
17 +#include <linux/gpio.h>
19 #define QUP_CONFIG 0x0000
20 #define QUP_STATE 0x0004
21 @@ -152,6 +153,7 @@ struct spi_qup {
23 struct dma_slave_config rx_conf;
24 struct dma_slave_config tx_conf;
29 @@ -370,7 +372,8 @@ static int spi_qup_do_pio(struct spi_mas
33 - spi_qup_fifo_write(qup, xfer);
34 + if (qup->mode == QUP_IO_M_MODE_FIFO)
35 + spi_qup_fifo_write(qup, xfer);
39 @@ -448,6 +451,7 @@ spi_qup_get_mode(struct spi_master *mast
41 struct spi_qup *qup = spi_master_get_devdata(master);
43 + size_t dma_align = dma_get_cache_alignment();
47 @@ -458,6 +462,14 @@ spi_qup_get_mode(struct spi_master *mast
49 qup->n_words = xfer->len / qup->w_size;
51 + if (!IS_ERR_OR_NULL(master->dma_rx) &&
52 + IS_ALIGNED((size_t)xfer->tx_buf, dma_align) &&
53 + IS_ALIGNED((size_t)xfer->rx_buf, dma_align) &&
54 + !is_vmalloc_addr(xfer->tx_buf) &&
55 + !is_vmalloc_addr(xfer->rx_buf) &&
56 + (xfer->len > 3*qup->in_blk_sz))
59 if (qup->n_words <= (qup->in_fifo_sz / sizeof(u32)))
60 mode = QUP_IO_M_MODE_FIFO;
62 @@ -491,7 +503,7 @@ static int spi_qup_io_config(struct spi_
66 - mode = spi_qup_get_mode(spi->master, xfer);
67 + controller->mode = mode = spi_qup_get_mode(spi->master, xfer);
68 n_words = controller->n_words;
70 if (mode == QUP_IO_M_MODE_FIFO) {
71 @@ -500,6 +512,7 @@ static int spi_qup_io_config(struct spi_
72 /* must be zero for FIFO */
73 writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT);
74 writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT);
75 + controller->use_dma = 0;
76 } else if (!controller->use_dma) {
77 writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT);
78 writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT);
79 @@ -750,6 +763,38 @@ err_tx:
83 +static void spi_qup_set_cs(struct spi_device *spi, bool val)
85 + struct spi_qup *controller;
89 + controller = spi_master_get_devdata(spi->master);
90 + spi_ioc = readl_relaxed(controller->base + SPI_IO_CONTROL);
91 + spi_ioc_orig = spi_ioc;
93 + spi_ioc |= SPI_IO_C_FORCE_CS;
95 + spi_ioc &= ~SPI_IO_C_FORCE_CS;
97 + if (spi_ioc != spi_ioc_orig)
98 + writel_relaxed(spi_ioc, controller->base + SPI_IO_CONTROL);
101 +static int spi_qup_setup(struct spi_device *spi)
103 + if (spi->cs_gpio >= 0) {
104 + if (spi->mode & SPI_CS_HIGH)
105 + gpio_set_value(spi->cs_gpio, 0);
107 + gpio_set_value(spi->cs_gpio, 1);
115 static int spi_qup_probe(struct platform_device *pdev)
117 struct spi_master *master;
118 @@ -846,6 +891,11 @@ static int spi_qup_probe(struct platform
119 if (of_device_is_compatible(dev->of_node, "qcom,spi-qup-v1.1.1"))
120 controller->qup_v1 = 1;
122 + if (!controller->qup_v1)
123 + master->set_cs = spi_qup_set_cs;
125 + master->setup = spi_qup_setup;
127 spin_lock_init(&controller->lock);
128 init_completion(&controller->done);