1 From ec3e465ecf3f7dd26f2e22170e4c5f4b9979df5d Mon Sep 17 00:00:00 2001
2 From: Matthew McClintock <mmcclint@codeaurora.org>
3 Date: Mon, 21 Mar 2016 15:55:21 -0500
4 Subject: [PATCH 26/69] dts: ipq4019: Add support for IPQ4019 DK04 board
6 This is pretty similiar to a DK01 but has a bit more IO. Some notable
7 differences are listed below however they are not in the device tree yet
8 as we continue adding more support
15 Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
17 arch/arm/boot/dts/Makefile | 1 +
18 arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 12 +-
19 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts | 21 +++
20 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 163 ++++++++++++++++++++++++
21 4 files changed, 189 insertions(+), 8 deletions(-)
22 create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
23 create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
25 --- a/arch/arm/boot/dts/Makefile
26 +++ b/arch/arm/boot/dts/Makefile
27 @@ -617,6 +617,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
28 qcom-apq8084-ifc6540.dtb \
29 qcom-apq8084-mtp.dtb \
30 qcom-ipq4019-ap.dk01.1-c1.dtb \
31 + qcom-ipq4019-ap.dk04.1-c1.dtb \
32 qcom-ipq8064-ap148.dtb \
33 qcom-msm8660-surf.dtb \
34 qcom-msm8960-cdp.dtb \
36 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
38 +/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
40 + * Permission to use, copy, modify, and/or distribute this software for any
41 + * purpose with or without fee is hereby granted, provided that the above
42 + * copyright notice and this permission notice appear in all copies.
44 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
45 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
46 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
47 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
48 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
49 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
50 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
54 +#include "qcom-ipq4019-ap.dk04.1.dtsi"
57 + model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK04.1-C1";
60 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
62 +/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
64 + * Permission to use, copy, modify, and/or distribute this software for any
65 + * purpose with or without fee is hereby granted, provided that the above
66 + * copyright notice and this permission notice appear in all copies.
68 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
69 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
70 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
71 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
72 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
73 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
74 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
78 +#include "qcom-ipq4019.dtsi"
81 + model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
82 + compatible = "qcom,ipq4019";
86 + compatible = "fixed-clock";
87 + clock-frequency = <48000000>;
94 + compatible = "arm,armv7-timer";
95 + interrupts = <1 2 0xf08>,
99 + clock-frequency = <48000000>;
102 + pinctrl@0x01000000 {
103 + serial_0_pins: serial_pinmux {
105 + pins = "gpio16", "gpio17";
106 + function = "blsp_uart0";
111 + serial_1_pins: serial1_pinmux {
113 + pins = "gpio8", "gpio9";
114 + function = "blsp_uart1";
119 + spi_0_pins: spi_0_pinmux {
121 + function = "blsp_spi0";
122 + pins = "gpio13", "gpio14", "gpio15";
129 + pins = "gpio13", "gpio14", "gpio15";
130 + drive-strength = <12>;
135 + drive-strength = <2>;
141 + i2c_0_pins: i2c_0_pinmux {
143 + function = "blsp_i2c0";
144 + pins = "gpio10", "gpio11";
147 + pins = "gpio10", "gpio11";
148 + drive-strength = <16>;
154 + blsp_dma: dma@7884000 {
158 + spi_0: spi@78b5000 {
159 + pinctrl-0 = <&spi_0_pins>;
160 + pinctrl-names = "default";
162 + cs-gpios = <&tlmm 12 0>;
165 + #address-cells = <1>;
168 + compatible = "mx25l25635e";
169 + spi-max-frequency = <24000000>;
173 + i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */
174 + pinctrl-0 = <&i2c_0_pins>;
175 + pinctrl-names = "default";
181 + pinctrl-0 = <&serial_0_pins>;
182 + pinctrl-names = "default";
187 + pinctrl-0 = <&serial_1_pins>;
188 + pinctrl-names = "default";
192 + usb3_ss_phy: ssphy@9a000 {
196 + usb3_hs_phy: hsphy@a6000 {
200 + usb3: usb3@8af8800 {
204 + usb2_hs_phy: hsphy@a8000 {
208 + usb2: usb2@60f8800 {
212 + cryptobam: dma@8e04000 {