1 From ff1ecc5bfc11377e82894d05aa45a92657ef8a06 Mon Sep 17 00:00:00 2001
2 From: Matthew McClintock <mmcclint@codeaurora.org>
3 Date: Mon, 21 Mar 2016 15:55:21 -0500
4 Subject: [PATCH 37/37] dts: ipq4019: Add support for IPQ4019 DK04 board
6 This is pretty similiar to a DK01 but has a bit more IO. Some notable
7 differences are listed below however they are not in the device tree yet
8 as we continue adding more support
15 Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
17 arch/arm/boot/dts/Makefile | 1 +
18 arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 12 +-
19 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts | 21 +++
20 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 163 +++++++++++++++++++++++
21 4 files changed, 189 insertions(+), 8 deletions(-)
22 create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
23 create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
25 --- a/arch/arm/boot/dts/Makefile
26 +++ b/arch/arm/boot/dts/Makefile
27 @@ -617,6 +617,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
28 qcom-apq8084-ifc6540.dtb \
29 qcom-apq8084-mtp.dtb \
30 qcom-ipq4019-ap.dk01.1-c1.dtb \
31 + qcom-ipq4019-ap.dk04.1-c1.dtb \
32 qcom-ipq8064-ap148.dtb \
33 qcom-msm8660-surf.dtb \
34 qcom-msm8960-cdp.dtb \
35 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
36 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
41 - usb3_ss_phy: ssphy@0 {
45 - dummy_ss_phy: ssphy@1 {
46 + usb3_ss_phy: ssphy@9a000 {
54 - usb2_hs_phy: hsphy@a8000 {
59 - usb3: usb3@8a00000 {
60 + usb2_hs_phy: hsphy@a8000 {
64 - usb2: usb2@6000000 {
70 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
72 +/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
74 + * Permission to use, copy, modify, and/or distribute this software for any
75 + * purpose with or without fee is hereby granted, provided that the above
76 + * copyright notice and this permission notice appear in all copies.
78 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
79 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
80 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
81 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
82 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
83 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
84 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
88 +#include "qcom-ipq4019-ap.dk04.1.dtsi"
91 + model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK04.1-C1";
94 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
96 +/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
98 + * Permission to use, copy, modify, and/or distribute this software for any
99 + * purpose with or without fee is hereby granted, provided that the above
100 + * copyright notice and this permission notice appear in all copies.
102 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
103 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
104 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
105 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
106 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
107 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
108 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
112 +#include "qcom-ipq4019.dtsi"
115 + model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
116 + compatible = "qcom,ipq4019";
120 + compatible = "fixed-clock";
121 + clock-frequency = <48000000>;
122 + #clock-cells = <0>;
128 + compatible = "arm,armv7-timer";
129 + interrupts = <1 2 0xf08>,
133 + clock-frequency = <48000000>;
136 + pinctrl@0x01000000 {
137 + serial_0_pins: serial_pinmux {
139 + pins = "gpio16", "gpio17";
140 + function = "blsp_uart0";
145 + serial_1_pins: serial1_pinmux {
147 + pins = "gpio8", "gpio9";
148 + function = "blsp_uart1";
153 + spi_0_pins: spi_0_pinmux {
155 + function = "blsp_spi0";
156 + pins = "gpio13", "gpio14", "gpio15";
163 + pins = "gpio13", "gpio14", "gpio15";
164 + drive-strength = <12>;
169 + drive-strength = <2>;
175 + i2c_0_pins: i2c_0_pinmux {
177 + function = "blsp_i2c0";
178 + pins = "gpio10", "gpio11";
181 + pins = "gpio10", "gpio11";
182 + drive-strength = <16>;
188 + blsp_dma: dma@7884000 {
192 + spi_0: spi@78b5000 {
193 + pinctrl-0 = <&spi_0_pins>;
194 + pinctrl-names = "default";
196 + cs-gpios = <&tlmm 12 0>;
199 + #address-cells = <1>;
202 + compatible = "mx25l25635e";
203 + spi-max-frequency = <24000000>;
207 + i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */
208 + pinctrl-0 = <&i2c_0_pins>;
209 + pinctrl-names = "default";
215 + pinctrl-0 = <&serial_0_pins>;
216 + pinctrl-names = "default";
221 + pinctrl-0 = <&serial_1_pins>;
222 + pinctrl-names = "default";
226 + usb3_ss_phy: ssphy@9a000 {
230 + usb3_hs_phy: hsphy@a6000 {
238 + usb2_hs_phy: hsphy@a8000 {
242 + usb2: usb2@6000000 {
246 + cryptobam: dma@8e04000 {