1 --- a/arch/arm/boot/dts/Makefile
2 +++ b/arch/arm/boot/dts/Makefile
5 dtb-$(CONFIG_SOC_AM43XX) += \
11 - am437x-sbc-t43.dtb \
14 dtb-$(CONFIG_SOC_OMAP5) += \
19 dtb-$(CONFIG_SOC_DRA7XX) += \
20 - am57xx-beagle-x15.dtb \
21 - am57xx-beagle-x15-revb1.dtb \
22 - am57xx-cl-som-am57x.dtb \
23 - am57xx-sbc-am57x.dtb \
28 + am57xx-beagle-x15.dtb \
30 dtb-$(CONFIG_ARCH_ORION5X) += \
31 - orion5x-kuroboxpro.dtb \
32 orion5x-lacie-d2-network.dtb \
33 orion5x-lacie-ethernet-disk-mini-v2.dtb \
34 - orion5x-linkstation-lsgl.dtb \
35 orion5x-linkstation-lswtgl.dtb \
37 orion5x-maxtor-shared-storage-2.dtb \
38 - orion5x-netgear-wnr854t.dtb \
39 orion5x-rd88f5182-nas.dtb
40 dtb-$(CONFIG_ARCH_PRIMA2) += \
42 -dtb-$(CONFIG_ARCH_OXNAS) += \
44 dtb-$(CONFIG_ARCH_QCOM) += \
45 - qcom-apq8060-dragonboard.dtb \
46 - qcom-apq8064-arrow-sd-600eval.dtb \
47 qcom-apq8064-cm-qs600.dtb \
48 qcom-apq8064-ifc6410.dtb \
49 - qcom-apq8064-sony-xperia-yuga.dtb \
50 - qcom-apq8064-asus-nexus7-flo.dtb \
51 qcom-apq8074-dragonboard.dtb \
52 qcom-apq8084-ifc6540.dtb \
53 qcom-apq8084-mtp.dtb \
54 - qcom-ipq4019-ap.dk01.1-c1.dtb \
55 - qcom-ipq4019-ap.dk04.1-c1.dtb \
56 qcom-ipq8064-ap148.dtb \
57 + qcom-ipq8064-c2600.dtb \
58 + qcom-ipq8064-d7800.dtb \
59 + qcom-ipq8064-db149.dtb \
60 + qcom-ipq8064-ea8500.dtb \
61 + qcom-ipq8064-r7500.dtb \
62 + qcom-ipq8064-r7500v2.dtb \
63 + qcom-ipq8065-nbg6817.dtb \
64 + qcom-ipq8065-r7800.dtb \
65 qcom-msm8660-surf.dtb \
66 qcom-msm8960-cdp.dtb \
67 - qcom-msm8974-lge-nexus5-hammerhead.dtb \
68 qcom-msm8974-sony-xperia-honami.dtb
69 dtb-$(CONFIG_ARCH_REALVIEW) += \
70 - arm-realview-pb1176.dtb \
71 - arm-realview-pb11mp.dtb \
72 - arm-realview-eb.dtb \
73 - arm-realview-eb-bbrevd.dtb \
74 - arm-realview-eb-11mp.dtb \
75 - arm-realview-eb-11mp-bbrevd.dtb \
76 - arm-realview-eb-11mp-ctrevb.dtb \
77 - arm-realview-eb-11mp-bbrevd-ctrevb.dtb \
78 - arm-realview-eb-a9mp.dtb \
79 - arm-realview-eb-a9mp-bbrevd.dtb \
80 - arm-realview-pba8.dtb \
81 - arm-realview-pbx-a9.dtb
82 + arm-realview-pb1176.dtb
83 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
86 rk3066a-bqcurie2.dtb \
87 rk3066a-marsboard.dtb \
88 rk3066a-rayeager.dtb \
89 rk3188-radxarock.dtb \
92 rk3288-evb-act8846.dtb \
93 rk3288-evb-rk808.dtb \
95 rk3288-firefly-beta.dtb \
97 - rk3288-firefly-reload.dtb \
101 rk3288-rock2-square.dtb \
102 - rk3288-veyron-brain.dtb \
103 rk3288-veyron-jaq.dtb \
104 rk3288-veyron-jerry.dtb \
105 - rk3288-veyron-mickey.dtb \
106 rk3288-veyron-minnie.dtb \
107 rk3288-veyron-pinky.dtb \
108 rk3288-veyron-speedy.dtb
109 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
110 +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
112 model = "Qualcomm IPQ8064/AP148";
113 compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
116 - serial0 = &gsbi4_serial;
120 - stdout-path = "serial0:115200n8";
122 + reg = <0x42000000 0x1e000000>;
123 + device_type = "memory";
133 + mdio-gpio0 = &mdio0;
137 + linux,stdout-path = "serial0:115200n8";
142 i2c4_pins: i2c4_pinmux {
148 + mdio0_pins: mdio0_pins {
150 + pins = "gpio0", "gpio1";
152 + drive-strength = <8>;
157 + rgmii2_pins: rgmii2_pins {
159 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
160 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
161 + function = "rgmii2";
162 + drive-strength = <8>;
173 - i2c4: i2c@16380000 {
176 - clock-frequency = <200000>;
178 - pinctrl-0 = <&i2c4_pins>;
179 - pinctrl-names = "default";
182 + * The i2c device on gsbi4 should not be enabled.
183 + * On ipq806x designs gsbi4 i2c is meant for exclusive
184 + * RPM usage. Turning this on in kernel manifests as
185 + * i2c failure for the RPM.
189 gsbi5: gsbi@1a200000 {
191 spi-max-frequency = <50000000>;
196 - reg = <0x0 0x1000000>;
201 - reg = <0x1000000 0x1000000>;
203 + linux,part-probe = "qcom-smem";
207 @@ -117,23 +132,105 @@
211 - ports-implemented = <0x1>;
215 + phy@100f8800 { /* USB3 port 1 HS phy */
219 + phy@100f8830 { /* USB3 port 1 SS phy */
223 + phy@110f8800 { /* USB3 port 0 HS phy */
227 + phy@110f8830 { /* USB3 port 0 SS phy */
239 + pcie0: pci@1b500000 {
241 + phy-tx0-term-offset = <7>;
244 + pcie1: pci@1b700000 {
246 + phy-tx0-term-offset = <7>;
252 pinctrl-0 = <&nand_pins>;
253 pinctrl-names = "default";
256 - compatible = "qcom,nandcs";
257 + nand-ecc-strength = <4>;
258 + nand-bus-width = <8>;
260 + linux,part-probe = "qcom-smem";
264 + compatible = "virtual,mdio-gpio";
265 + #address-cells = <1>;
267 + gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
268 + pinctrl-0 = <&mdio0_pins>;
269 + pinctrl-names = "default";
271 + phy0: ethernet-phy@0 {
272 + device_type = "ethernet-phy";
274 + qca,ar8327-initvals = <
275 + 0x00004 0x7600000 /* PAD0_MODE */
276 + 0x00008 0x1000000 /* PAD5_MODE */
277 + 0x0000c 0x80 /* PAD6_MODE */
278 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
279 + 0x000e0 0xc74164de /* SGMII_CTRL */
280 + 0x0007c 0x4e /* PORT0_STATUS */
281 + 0x00094 0x4e /* PORT6_STATUS */
285 + phy4: ethernet-phy@4 {
286 + device_type = "ethernet-phy";
291 + gmac1: ethernet@37200000 {
293 + phy-mode = "rgmii";
296 + pinctrl-0 = <&rgmii2_pins>;
297 + pinctrl-names = "default";
305 + gmac2: ethernet@37400000 {
307 + phy-mode = "sgmii";
310 - nand-ecc-strength = <4>;
311 - nand-ecc-step-size = <512>;
312 - nand-bus-width = <8>;
320 +++ b/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
322 +#include "qcom-ipq8064-v1.0.dtsi"
324 +#include <dt-bindings/input/input.h>
327 + model = "TP-Link Archer C2600";
328 + compatible = "tplink,c2600", "qcom,ipq8064";
331 + reg = <0x42000000 0x1e000000>;
332 + device_type = "memory";
336 + #address-cells = <1>;
340 + reg = <0x41200000 0x300000>;
347 + mdio-gpio0 = &mdio0;
350 + led-failsafe = &general;
351 + led-running = &power;
352 + led-upgrade = &general;
356 + linux,stdout-path = "serial0:115200n8";
361 + button_pins: button_pins {
363 + pins = "gpio16", "gpio54", "gpio65";
365 + drive-strength = <2>;
370 + i2c4_pins: i2c4_pinmux {
372 + pins = "gpio12", "gpio13";
373 + function = "gsbi4";
374 + drive-strength = <12>;
379 + led_pins: led_pins {
381 + pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio26", "gpio33",
382 + "gpio53", "gpio66";
384 + drive-strength = <2>;
389 + spi_pins: spi_pins {
391 + pins = "gpio18", "gpio19", "gpio21";
392 + function = "gsbi5";
397 + pins = "gpio18", "gpio19";
398 + drive-strength = <10>;
404 + drive-strength = <10>;
410 + drive-strength = <12>;
414 + mdio0_pins: mdio0_pins {
416 + pins = "gpio0", "gpio1";
418 + drive-strength = <8>;
423 + rgmii2_pins: rgmii2_pins {
425 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
426 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
427 + function = "rgmii2";
428 + drive-strength = <8>;
433 + usb0_pwr_en_pin: usb0_pwr_en_pin {
437 + drive-strength = <10>;
443 + usb1_pwr_en_pin: usb1_pwr_en_pin {
447 + drive-strength = <10>;
455 + qcom,mode = <GSBI_PROT_I2C_UART>;
461 + * The i2c device on gsbi4 should not be enabled.
462 + * On ipq806x designs gsbi4 i2c is meant for exclusive
463 + * RPM usage. Turning this on in kernel manifests as
464 + * i2c failure for the RPM.
468 + gsbi5: gsbi@1a200000 {
469 + qcom,mode = <GSBI_PROT_SPI>;
472 + spi5: spi@1a280000 {
475 + pinctrl-0 = <&spi_pins>;
476 + pinctrl-names = "default";
478 + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
481 + compatible = "jedec,spi-nor";
482 + #address-cells = <1>;
484 + spi-max-frequency = <50000000>;
489 + reg = <0x0 0x20000>;
495 + reg = <0x20000 0x20000>;
501 + reg = <0x40000 0x20000>;
507 + reg = <0x60000 0x30000>;
512 + label = "DDRCONFIG";
513 + reg = <0x90000 0x10000>;
519 + reg = <0xa0000 0x10000>;
525 + reg = <0xb0000 0x30000>;
531 + reg = <0xe0000 0x20000>;
536 + label = "fs-uboot";
537 + reg = <0x100000 0x70000>;
542 + label = "uboot-env";
543 + reg = <0x170000 0x40000>;
549 + reg = <0x1b0000 0x40000>;
554 + label = "os-image";
555 + reg = <0x1f0000 0x200000>;
560 + reg = <0x3f0000 0x1b00000>;
563 + defaultmac: default-mac@1ef0000 {
564 + label = "default-mac";
565 + reg = <0x1ef0000 0x00200>;
571 + reg = <0x1ef0200 0x00200>;
575 + product-info@1ef0400 {
576 + label = "product-info";
577 + reg = <0x1ef0400 0x0fc00>;
581 + partition-table@1f00000 {
582 + label = "partition-table";
583 + reg = <0x1f00000 0x10000>;
587 + soft-version@1f10000 {
588 + label = "soft-version";
589 + reg = <0x1f10000 0x10000>;
593 + support-list@1f20000 {
594 + label = "support-list";
595 + reg = <0x1f20000 0x10000>;
601 + reg = <0x1f30000 0x10000>;
605 + default-config@1f40000 {
606 + label = "default-config";
607 + reg = <0x1f40000 0x10000>;
611 + user-config@1f50000 {
612 + label = "user-config";
613 + reg = <0x1f50000 0x40000>;
619 + reg = <0x1f90000 0x40000>;
623 + usb-config@1fd0000 {
624 + label = "usb-config";
625 + reg = <0x1fd0000 0x10000>;
631 + reg = <0x1fe0000 0x20000>;
638 + phy@100f8800 { /* USB3 port 1 HS phy */
642 + phy@100f8830 { /* USB3 port 1 SS phy */
646 + phy@110f8800 { /* USB3 port 0 HS phy */
650 + phy@110f8830 { /* USB3 port 0 SS phy */
657 + pinctrl-0 = <&usb0_pwr_en_pin>;
658 + pinctrl-names = "default";
664 + pinctrl-0 = <&usb1_pwr_en_pin>;
665 + pinctrl-names = "default";
668 + pcie0: pci@1b500000 {
670 + phy-tx0-term-offset = <7>;
673 + pcie1: pci@1b700000 {
675 + phy-tx0-term-offset = <7>;
679 + compatible = "virtual,mdio-gpio";
680 + #address-cells = <1>;
682 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
683 + pinctrl-0 = <&mdio0_pins>;
684 + pinctrl-names = "default";
686 + phy0: ethernet-phy@0 {
687 + device_type = "ethernet-phy";
689 + qca,ar8327-initvals = <
690 + 0x00004 0x7600000 /* PAD0_MODE */
691 + 0x00008 0x1000000 /* PAD5_MODE */
692 + 0x0000c 0x80 /* PAD6_MODE */
693 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
694 + 0x000e0 0xc74164de /* SGMII_CTRL */
695 + 0x0007c 0x4e /* PORT0_STATUS */
696 + 0x00094 0x4e /* PORT6_STATUS */
700 + phy4: ethernet-phy@4 {
701 + device_type = "ethernet-phy";
706 + gmac1: ethernet@37200000 {
708 + phy-mode = "rgmii";
711 + pinctrl-0 = <&rgmii2_pins>;
712 + pinctrl-names = "default";
714 + mtd-mac-address = <&defaultmac 0x8>;
715 + mtd-mac-address-increment = <1>;
723 + gmac2: ethernet@37400000 {
725 + phy-mode = "sgmii";
728 + mtd-mac-address = <&defaultmac 0x8>;
737 + pinctrl-0 = <&i2c4_pins>;
738 + pinctrl-names = "default";
743 + compatible = "gpio-keys";
744 + pinctrl-0 = <&button_pins>;
745 + pinctrl-names = "default";
749 + gpios = <&qcom_pinmux 49 GPIO_ACTIVE_LOW>;
750 + linux,code = <KEY_RFKILL>;
755 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
756 + linux,code = <KEY_RESTART>;
761 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
762 + linux,code = <KEY_WPS_BUTTON>;
766 + label = "ledswitch";
767 + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
768 + linux,code = <KEY_LIGHTS_TOGGLE>;
773 + compatible = "gpio-leds";
774 + pinctrl-0 = <&led_pins>;
775 + pinctrl-names = "default";
778 + label = "c2600:white:lan";
779 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
783 + label = "c2600:white:usb_4";
784 + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
788 + label = "c2600:white:usb_2";
789 + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
793 + label = "c2600:white:wps";
794 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
798 + label = "c2600:amber:wan";
799 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
803 + label = "c2600:white:wan";
804 + gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>;
808 + label = "c2600:white:power";
809 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
810 + default-state = "keep";
814 + label = "c2600:white:general";
815 + gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
824 +++ b/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
826 +#include "qcom-ipq8064-v1.0.dtsi"
828 +#include <dt-bindings/input/input.h>
831 + model = "Netgear Nighthawk X4 D7800";
832 + compatible = "netgear,d7800", "qcom,ipq8064";
835 + reg = <0x42000000 0xe000000>;
836 + device_type = "memory";
840 + #address-cells = <1>;
844 + reg = <0x41200000 0x300000>;
851 + mdio-gpio0 = &mdio0;
853 + led-boot = &power_white;
854 + led-failsafe = &power_amber;
855 + led-running = &power_white;
856 + led-upgrade = &power_amber;
860 + bootargs = "rootfstype=squashfs noinitrd";
861 + linux,stdout-path = "serial0:115200n8";
866 + button_pins: button_pins {
868 + pins = "gpio6", "gpio54", "gpio65";
870 + drive-strength = <2>;
875 + i2c4_pins: i2c4_pinmux {
877 + pins = "gpio12", "gpio13";
878 + function = "gsbi4";
879 + drive-strength = <12>;
884 + led_pins: led_pins {
886 + pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
887 + "gpio24","gpio26", "gpio53", "gpio64";
889 + drive-strength = <2>;
894 + mdio0_pins: mdio0_pins {
896 + pins = "gpio0", "gpio1";
898 + drive-strength = <8>;
903 + nand_pins: nand_pins {
905 + pins = "gpio34", "gpio35", "gpio36",
906 + "gpio37", "gpio38", "gpio39",
907 + "gpio40", "gpio41", "gpio42",
908 + "gpio43", "gpio44", "gpio45",
909 + "gpio46", "gpio47";
911 + drive-strength = <10>;
919 + pins = "gpio40", "gpio41", "gpio42",
920 + "gpio43", "gpio44", "gpio45",
921 + "gpio46", "gpio47";
926 + rgmii2_pins: rgmii2_pins {
928 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
929 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
930 + function = "rgmii2";
931 + drive-strength = <8>;
936 + usb0_pwr_en_pins: usb0_pwr_en_pins {
940 + drive-strength = <12>;
946 + usb1_pwr_en_pins: usb1_pwr_en_pins {
948 + pins = "gpio16", "gpio68";
950 + drive-strength = <12>;
958 + qcom,mode = <GSBI_PROT_I2C_UART>;
964 + * The i2c device on gsbi4 should not be enabled.
965 + * On ipq806x designs gsbi4 i2c is meant for exclusive
966 + * RPM usage. Turning this on in kernel manifests as
967 + * i2c failure for the RPM.
971 + sata-phy@1b400000 {
979 + phy@100f8800 { /* USB3 port 1 HS phy */
983 + phy@100f8830 { /* USB3 port 1 SS phy */
987 + phy@110f8800 { /* USB3 port 0 HS phy */
991 + phy@110f8830 { /* USB3 port 0 SS phy */
998 + pinctrl-0 = <&usb0_pwr_en_pins>;
999 + pinctrl-names = "default";
1005 + pinctrl-0 = <&usb1_pwr_en_pins>;
1006 + pinctrl-names = "default";
1009 + pcie0: pci@1b500000 {
1011 + reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
1012 + pinctrl-0 = <&pcie0_pins>;
1013 + pinctrl-names = "default";
1016 + pcie1: pci@1b700000 {
1018 + reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
1019 + pinctrl-0 = <&pcie1_pins>;
1020 + pinctrl-names = "default";
1026 + pinctrl-0 = <&nand_pins>;
1027 + pinctrl-names = "default";
1029 + nand-ecc-strength = <4>;
1030 + nand-bus-width = <8>;
1032 + #address-cells = <1>;
1033 + #size-cells = <1>;
1036 + label = "qcadata";
1037 + reg = <0x0000000 0x0c80000>;
1043 + reg = <0x0c80000 0x0500000>;
1047 + APPSBLENV@1180000 {
1048 + label = "APPSBLENV";
1049 + reg = <0x1180000 0x0080000>;
1053 + art: art@1200000 {
1055 + reg = <0x1200000 0x0140000>;
1059 + artbak: art@1340000 {
1061 + reg = <0x1340000 0x0140000>;
1067 + reg = <0x1480000 0x0200000>;
1072 + reg = <0x1680000 0x1E00000>;
1076 + label = "netgear";
1077 + reg = <0x3480000 0x4480000>;
1082 + label = "reserve";
1083 + reg = <0x7900000 0x0700000>;
1087 + firmware@1480000 {
1088 + label = "firmware";
1089 + reg = <0x1480000 0x2000000>;
1094 + compatible = "virtual,mdio-gpio";
1095 + #address-cells = <1>;
1096 + #size-cells = <0>;
1097 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
1098 + pinctrl-0 = <&mdio0_pins>;
1099 + pinctrl-names = "default";
1101 + phy0: ethernet-phy@0 {
1102 + device_type = "ethernet-phy";
1104 + qca,ar8327-initvals = <
1105 + 0x00004 0x7600000 /* PAD0_MODE */
1106 + 0x00008 0x1000000 /* PAD5_MODE */
1107 + 0x0000c 0x80 /* PAD6_MODE */
1108 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
1109 + 0x000e0 0xc74164de /* SGMII_CTRL */
1110 + 0x0007c 0x4e /* PORT0_STATUS */
1111 + 0x00094 0x4e /* PORT6_STATUS */
1115 + phy4: ethernet-phy@4 {
1116 + device_type = "ethernet-phy";
1121 + gmac1: ethernet@37200000 {
1123 + phy-mode = "rgmii";
1124 + phy-handle = <&phy4>;
1127 + pinctrl-0 = <&rgmii2_pins>;
1128 + pinctrl-names = "default";
1130 + mtd-mac-address = <&art 6>;
1133 + gmac2: ethernet@37400000 {
1135 + phy-mode = "sgmii";
1138 + mtd-mac-address = <&art 0>;
1147 + pinctrl-0 = <&i2c4_pins>;
1148 + pinctrl-names = "default";
1153 + compatible = "gpio-keys";
1154 + pinctrl-0 = <&button_pins>;
1155 + pinctrl-names = "default";
1159 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
1160 + linux,code = <KEY_RFKILL>;
1165 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
1166 + linux,code = <KEY_RESTART>;
1171 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
1172 + linux,code = <KEY_WPS_BUTTON>;
1177 + compatible = "gpio-leds";
1178 + pinctrl-0 = <&led_pins>;
1179 + pinctrl-names = "default";
1182 + label = "d7800:white:usb1";
1183 + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
1187 + label = "d7800:white:usb2";
1188 + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
1191 + power_amber: power_amber {
1192 + label = "d7800:amber:power";
1193 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
1197 + label = "d7800:white:wan";
1198 + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
1202 + label = "d7800:amber:wan";
1203 + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
1207 + label = "d7800:white:wps";
1208 + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
1212 + label = "d7800:white:esata";
1213 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
1216 + power_white: power_white {
1217 + label = "d7800:white:power";
1218 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
1219 + default-state = "keep";
1223 + label = "d7800:white:wifi";
1224 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
1233 +++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
1235 +#include "qcom-ipq8064-v1.0.dtsi"
1238 + model = "Qualcomm IPQ8064/DB149";
1239 + compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
1242 + #address-cells = <1>;
1243 + #size-cells = <1>;
1246 + reg = <0x41200000 0x300000>;
1253 + mdio-gpio0 = &mdio0;
1257 + linux,stdout-path = "serial0:115200n8";
1262 + i2c4_pins: i2c4_pinmux {
1263 + pins = "gpio12", "gpio13";
1264 + function = "gsbi4";
1268 + spi_pins: spi_pins {
1270 + pins = "gpio18", "gpio19", "gpio21";
1271 + function = "gsbi5";
1272 + drive-strength = <10>;
1277 + mdio0_pins: mdio0_pins {
1279 + pins = "gpio0", "gpio1";
1280 + function = "gpio";
1281 + drive-strength = <8>;
1286 + rgmii0_pins: rgmii0_pins {
1288 + pins = "gpio2", "gpio66";
1289 + drive-strength = <8>;
1295 + gsbi2: gsbi@12480000 {
1296 + qcom,mode = <GSBI_PROT_I2C_UART>;
1298 + uart2: serial@12490000 {
1303 + gsbi5: gsbi@1a200000 {
1304 + qcom,mode = <GSBI_PROT_SPI>;
1307 + spi4: spi@1a280000 {
1309 + spi-max-frequency = <50000000>;
1311 + pinctrl-0 = <&spi_pins>;
1312 + pinctrl-names = "default";
1314 + cs-gpios = <&qcom_pinmux 20 0>;
1317 + compatible = "s25fl256s1";
1318 + #address-cells = <1>;
1319 + #size-cells = <1>;
1320 + spi-max-frequency = <50000000>;
1325 + label = "lowlevel_init";
1326 + reg = <0x0 0x1b0000>;
1331 + reg = <0x1b0000 0x80000>;
1335 + label = "u-boot-env";
1336 + reg = <0x230000 0x40000>;
1340 + label = "caldata";
1341 + reg = <0x270000 0x40000>;
1345 + label = "firmware";
1346 + reg = <0x2b0000 0x1d50000>;
1352 + sata-phy@1b400000 {
1360 + phy@100f8800 { /* USB3 port 1 HS phy */
1364 + phy@100f8830 { /* USB3 port 1 SS phy */
1368 + phy@110f8800 { /* USB3 port 0 HS phy */
1372 + phy@110f8830 { /* USB3 port 0 SS phy */
1384 + pcie0: pci@1b500000 {
1388 + pcie1: pci@1b700000 {
1392 + pcie2: pci@1b900000 {
1397 + compatible = "virtual,mdio-gpio";
1398 + #address-cells = <1>;
1399 + #size-cells = <0>;
1400 + gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
1402 + pinctrl-0 = <&mdio0_pins>;
1403 + pinctrl-names = "default";
1405 + phy0: ethernet-phy@0 {
1406 + device_type = "ethernet-phy";
1408 + qca,ar8327-initvals = <
1409 + 0x00004 0x7600000 /* PAD0_MODE */
1410 + 0x00008 0x1000000 /* PAD5_MODE */
1411 + 0x0000c 0x80 /* PAD6_MODE */
1412 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
1413 + 0x000e0 0xc74164de /* SGMII_CTRL */
1414 + 0x0007c 0x4e /* PORT0_STATUS */
1415 + 0x00094 0x4e /* PORT6_STATUS */
1419 + phy4: ethernet-phy@4 {
1420 + device_type = "ethernet-phy";
1424 + phy6: ethernet-phy@6 {
1425 + device_type = "ethernet-phy";
1429 + phy7: ethernet-phy@7 {
1430 + device_type = "ethernet-phy";
1435 + gmac0: ethernet@37000000 {
1437 + phy-mode = "rgmii";
1439 + phy-handle = <&phy4>;
1441 + pinctrl-0 = <&rgmii0_pins>;
1442 + pinctrl-names = "default";
1445 + gmac1: ethernet@37200000 {
1447 + phy-mode = "sgmii";
1456 + gmac2: ethernet@37400000 {
1458 + phy-mode = "sgmii";
1460 + phy-handle = <&phy6>;
1463 + gmac3: ethernet@37600000 {
1465 + phy-mode = "sgmii";
1467 + phy-handle = <&phy7>;
1471 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
1472 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
1476 #include "skeleton.dtsi"
1477 -#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
1478 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
1479 +#include <dt-bindings/mfd/qcom-rpm.h>
1480 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
1481 #include <dt-bindings/soc/qcom,gsbi.h>
1482 +#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
1483 #include <dt-bindings/interrupt-controller/arm-gic.h>
1484 +#include <dt-bindings/gpio/gpio.h>
1487 model = "Qualcomm IPQ8064";
1489 #address-cells = <1>;
1494 compatible = "qcom,krait";
1495 enable-method = "qcom,kpss-acc-v1";
1496 device_type = "cpu";
1498 next-level-cache = <&L2>;
1501 + clocks = <&kraitcc 0>, <&kraitcc 4>;
1502 + clock-names = "cpu", "l2";
1503 + clock-latency = <100000>;
1504 + cpu-supply = <&smb208_s2a>;
1505 + voltage-tolerance = <5>;
1506 + cooling-min-state = <0>;
1507 + cooling-max-state = <10>;
1508 + #cooling-cells = <2>;
1509 + cpu-idle-states = <&CPU_SPC>;
1514 compatible = "qcom,krait";
1515 enable-method = "qcom,kpss-acc-v1";
1516 device_type = "cpu";
1517 @@ -34,11 +45,120 @@
1518 next-level-cache = <&L2>;
1521 + clocks = <&kraitcc 1>, <&kraitcc 4>;
1522 + clock-names = "cpu", "l2";
1523 + clock-latency = <100000>;
1524 + cpu-supply = <&smb208_s2b>;
1525 + cooling-min-state = <0>;
1526 + cooling-max-state = <10>;
1527 + #cooling-cells = <2>;
1528 + cpu-idle-states = <&CPU_SPC>;
1532 compatible = "cache";
1534 + qcom,saw = <&saw_l2>;
1538 + qcom,l2-rates = <384000000 1000000000 1200000000>;
1543 + compatible = "qcom,idle-state-spc",
1545 + entry-latency-us = <400>;
1546 + exit-latency-us = <900>;
1547 + min-residency-us = <3000>;
1554 + polling-delay-passive = <250>;
1555 + polling-delay = <1000>;
1557 + thermal-sensors = <&gcc 5>;
1558 + coefficients = <1132 0>;
1561 + cpu_alert0: trip0 {
1562 + temperature = <75000>;
1563 + hysteresis = <2000>;
1566 + cpu_crit0: trip1 {
1567 + temperature = <110000>;
1568 + hysteresis = <2000>;
1569 + type = "critical";
1575 + polling-delay-passive = <250>;
1576 + polling-delay = <1000>;
1578 + thermal-sensors = <&gcc 6>;
1579 + coefficients = <1132 0>;
1582 + cpu_alert1: trip0 {
1583 + temperature = <75000>;
1584 + hysteresis = <2000>;
1587 + cpu_crit1: trip1 {
1588 + temperature = <110000>;
1589 + hysteresis = <2000>;
1590 + type = "critical";
1596 + polling-delay-passive = <250>;
1597 + polling-delay = <1000>;
1599 + thermal-sensors = <&gcc 7>;
1600 + coefficients = <1199 0>;
1603 + cpu_alert2: trip0 {
1604 + temperature = <75000>;
1605 + hysteresis = <2000>;
1608 + cpu_crit2: trip1 {
1609 + temperature = <110000>;
1610 + hysteresis = <2000>;
1611 + type = "critical";
1617 + polling-delay-passive = <250>;
1618 + polling-delay = <1000>;
1620 + thermal-sensors = <&gcc 8>;
1621 + coefficients = <1132 0>;
1624 + cpu_alert3: trip0 {
1625 + temperature = <75000>;
1626 + hysteresis = <2000>;
1629 + cpu_crit3: trip1 {
1630 + temperature = <110000>;
1631 + hysteresis = <2000>;
1632 + type = "critical";
1643 + smem: smem@41000000 {
1644 reg = <0x41000000 0x200000>;
1647 @@ -67,13 +187,13 @@
1649 compatible = "fixed-clock";
1651 - clock-frequency = <19200000>;
1652 + clock-frequency = <25000000>;
1656 compatible = "fixed-clock";
1658 - clock-frequency = <27000000>;
1659 + clock-frequency = <25000000>;
1662 sleep_clk: sleep_clk {
1667 + kraitcc: clock-controller {
1668 + compatible = "qcom,krait-cc-v1";
1669 + #clock-cells = <1>;
1673 + qcom,pvs-format-a;
1674 + qcom,speed0-pvs0-bin-v0 =
1675 + < 1400000000 1250000 >,
1676 + < 1200000000 1200000 >,
1677 + < 1000000000 1150000 >,
1678 + < 800000000 1100000 >,
1679 + < 600000000 1050000 >,
1680 + < 384000000 1000000 >;
1682 + qcom,speed0-pvs1-bin-v0 =
1683 + < 1400000000 1175000 >,
1684 + < 1200000000 1125000 >,
1685 + < 1000000000 1075000 >,
1686 + < 800000000 1025000 >,
1687 + < 600000000 975000 >,
1688 + < 384000000 925000 >;
1690 + qcom,speed0-pvs2-bin-v0 =
1691 + < 1400000000 1125000 >,
1692 + < 1200000000 1075000 >,
1693 + < 1000000000 1025000 >,
1694 + < 800000000 995000 >,
1695 + < 600000000 925000 >,
1696 + < 384000000 875000 >;
1698 + qcom,speed0-pvs3-bin-v0 =
1699 + < 1400000000 1050000 >,
1700 + < 1200000000 1000000 >,
1701 + < 1000000000 950000 >,
1702 + < 800000000 900000 >,
1703 + < 600000000 850000 >,
1704 + < 384000000 800000 >;
1708 #address-cells = <1>;
1710 @@ -104,6 +264,85 @@
1711 reg-names = "lpass-lpaif";
1714 + qfprom: qfprom@700000 {
1715 + compatible = "qcom,qfprom", "syscon";
1716 + reg = <0x00700000 0x1000>;
1717 + #address-cells = <1>;
1718 + #size-cells = <1>;
1721 + tsens_calib: calib {
1722 + reg = <0x400 0x10>;
1724 + tsens_backup: backup_calib {
1725 + reg = <0x410 0x10>;
1730 + compatible = "qcom,rpm-ipq8064";
1731 + reg = <0x108000 0x1000>;
1732 + qcom,ipc = <&l2cc 0x8 2>;
1734 + interrupts = <0 19 0>,
1737 + interrupt-names = "ack",
1741 + clocks = <&gcc RPM_MSG_RAM_H_CLK>;
1742 + clock-names = "ram";
1744 + #address-cells = <1>;
1745 + #size-cells = <0>;
1747 + rpmcc: clock-controller {
1748 + compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
1749 + #clock-cells = <1>;
1753 + compatible = "qcom,rpm-smb208-regulators";
1756 + regulator-min-microvolt = <1050000>;
1757 + regulator-max-microvolt = <1150000>;
1759 + qcom,switch-mode-frequency = <1200000>;
1764 + regulator-min-microvolt = <1050000>;
1765 + regulator-max-microvolt = <1150000>;
1767 + qcom,switch-mode-frequency = <1200000>;
1771 + regulator-min-microvolt = < 800000>;
1772 + regulator-max-microvolt = <1250000>;
1774 + qcom,switch-mode-frequency = <1200000>;
1778 + regulator-min-microvolt = < 800000>;
1779 + regulator-max-microvolt = <1250000>;
1781 + qcom,switch-mode-frequency = <1200000>;
1787 + compatible = "qcom,prng";
1788 + reg = <0x1a500000 0x200>;
1789 + clocks = <&gcc PRNG_CLK>;
1790 + clock-names = "core";
1793 qcom_pinmux: pinmux@800000 {
1794 compatible = "qcom,ipq8064-pinctrl";
1795 reg = <0x800000 0x4000>;
1796 @@ -113,6 +352,34 @@
1797 interrupt-controller;
1798 #interrupt-cells = <2>;
1799 interrupts = <0 16 0x4>;
1801 + pcie0_pins: pcie0_pinmux {
1804 + function = "pcie1_rst";
1805 + drive-strength = <2>;
1810 + pcie1_pins: pcie1_pinmux {
1813 + function = "pcie2_rst";
1814 + drive-strength = <2>;
1819 + pcie2_pins: pcie2_pinmux {
1822 + function = "pcie3_rst";
1823 + drive-strength = <2>;
1830 intc: interrupt-controller@2000000 {
1835 - compatible = "qcom,kpss-timer",
1836 - "qcom,kpss-wdt-ipq8064", "qcom,msm-timer";
1837 + compatible = "qcom,kpss-timer", "qcom,msm-timer";
1838 interrupts = <1 1 0x301>,
1841 @@ -142,25 +408,44 @@
1842 acc0: clock-controller@2088000 {
1843 compatible = "qcom,kpss-acc-v1";
1844 reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
1845 + clock-output-names = "acpu0_aux";
1848 acc1: clock-controller@2098000 {
1849 compatible = "qcom,kpss-acc-v1";
1850 reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
1851 + clock-output-names = "acpu1_aux";
1854 + l2cc: clock-controller@2011000 {
1855 + compatible = "qcom,kpss-gcc", "syscon";
1856 + reg = <0x2011000 0x1000>;
1857 + clock-output-names = "acpu_l2_aux";
1860 saw0: regulator@2089000 {
1861 - compatible = "qcom,saw2";
1862 + compatible = "qcom,saw2", "syscon";
1863 reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
1867 saw1: regulator@2099000 {
1868 - compatible = "qcom,saw2";
1869 + compatible = "qcom,saw2", "syscon";
1870 reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
1874 + saw_l2: regulator@02012000 {
1875 + compatible = "qcom,saw2", "syscon";
1876 + reg = <0x02012000 0x1000>;
1880 + sic_non_secure: sic-non-secure@12100000 {
1881 + compatible = "syscon";
1882 + reg = <0x12100000 0x10000>;
1885 gsbi2: gsbi@12480000 {
1886 compatible = "qcom,gsbi-v1.0.0";
1890 syscon-tcsr = <&tcsr>;
1893 + uart2: serial@12490000 {
1894 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
1895 reg = <0x12490000 0x1000>,
1896 <0x12480000 0x1000>;
1899 syscon-tcsr = <&tcsr>;
1901 - gsbi4_serial: serial@16340000 {
1902 + uart4: serial@16340000 {
1903 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
1904 reg = <0x16340000 0x1000>,
1905 <0x16300000 0x1000>;
1908 syscon-tcsr = <&tcsr>;
1911 + uart5: serial@1a240000 {
1912 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
1913 reg = <0x1a240000 0x1000>,
1914 <0x1a200000 0x1000>;
1915 @@ -328,8 +613,12 @@
1916 gcc: clock-controller@900000 {
1917 compatible = "qcom,gcc-ipq8064";
1918 reg = <0x00900000 0x4000>;
1919 + nvmem-cells = <&tsens_calib>, <&tsens_backup>;
1920 + nvmem-cell-names = "calib", "calib_backup";
1923 + #power-domain-cells = <1>;
1924 + #thermal-sensor-cells = <1>;
1927 tcsr: syscon@1a400000 {
1928 @@ -344,10 +633,259 @@
1932 + sfpb_mutex_block: syscon@1200600 {
1933 + compatible = "syscon";
1934 + reg = <0x01200600 0x100>;
1937 + hs_phy_1: phy@100f8800 {
1938 + compatible = "qcom,dwc3-hs-usb-phy";
1939 + reg = <0x100f8800 0x30>;
1940 + clocks = <&gcc USB30_1_UTMI_CLK>;
1941 + clock-names = "ref";
1944 + status = "disabled";
1947 + ss_phy_1: phy@100f8830 {
1948 + compatible = "qcom,dwc3-ss-usb-phy";
1949 + reg = <0x100f8830 0x30>;
1950 + clocks = <&gcc USB30_1_MASTER_CLK>;
1951 + clock-names = "ref";
1954 + status = "disabled";
1957 + hs_phy_0: phy@110f8800 {
1958 + compatible = "qcom,dwc3-hs-usb-phy";
1959 + reg = <0x110f8800 0x30>;
1960 + clocks = <&gcc USB30_0_UTMI_CLK>;
1961 + clock-names = "ref";
1964 + status = "disabled";
1967 + ss_phy_0: phy@110f8830 {
1968 + compatible = "qcom,dwc3-ss-usb-phy";
1969 + reg = <0x110f8830 0x30>;
1970 + clocks = <&gcc USB30_0_MASTER_CLK>;
1971 + clock-names = "ref";
1974 + status = "disabled";
1978 + compatible = "qcom,dwc3";
1979 + #address-cells = <1>;
1980 + #size-cells = <1>;
1981 + clocks = <&gcc USB30_0_MASTER_CLK>;
1982 + clock-names = "core";
1984 + syscon-tcsr = <&tcsr 0xb0 1>;
1988 + status = "disabled";
1991 + compatible = "snps,dwc3";
1992 + reg = <0x11000000 0xcd00>;
1993 + interrupts = <0 110 0x4>;
1994 + phys = <&hs_phy_0>, <&ss_phy_0>;
1995 + phy-names = "usb2-phy", "usb3-phy";
1997 + snps,dis_u3_susphy_quirk;
2002 + compatible = "qcom,dwc3";
2003 + #address-cells = <1>;
2004 + #size-cells = <1>;
2005 + clocks = <&gcc USB30_1_MASTER_CLK>;
2006 + clock-names = "core";
2008 + syscon-tcsr = <&tcsr 0xb0 0>;
2012 + status = "disabled";
2015 + compatible = "snps,dwc3";
2016 + reg = <0x10000000 0xcd00>;
2017 + interrupts = <0 205 0x4>;
2018 + phys = <&hs_phy_1>, <&ss_phy_1>;
2019 + phy-names = "usb2-phy", "usb3-phy";
2021 + snps,dis_u3_susphy_quirk;
2025 + pcie0: pci@1b500000 {
2026 + compatible = "qcom,pcie-v0";
2027 + reg = <0x1b500000 0x1000
2030 + 0x0ff00000 0x100000>;
2031 + reg-names = "dbi", "elbi", "parf", "config";
2032 + device_type = "pci";
2033 + linux,pci-domain = <0>;
2034 + bus-range = <0x00 0xff>;
2036 + #address-cells = <3>;
2037 + #size-cells = <2>;
2039 + ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */
2040 + 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
2042 + interrupts = <GIC_SPI 35 IRQ_TYPE_NONE>;
2043 + interrupt-names = "msi";
2044 + #interrupt-cells = <1>;
2045 + interrupt-map-mask = <0 0 0 0x7>;
2046 + interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2047 + <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
2048 + <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
2049 + <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
2051 + clocks = <&gcc PCIE_A_CLK>,
2052 + <&gcc PCIE_H_CLK>,
2053 + <&gcc PCIE_PHY_CLK>,
2054 + <&gcc PCIE_AUX_CLK>,
2055 + <&gcc PCIE_ALT_REF_CLK>;
2056 + clock-names = "core", "iface", "phy", "aux", "ref";
2058 + assigned-clocks = <&gcc PCIE_ALT_REF_CLK>;
2059 + assigned-clock-rates = <100000000>;
2061 + resets = <&gcc PCIE_ACLK_RESET>,
2062 + <&gcc PCIE_HCLK_RESET>,
2063 + <&gcc PCIE_POR_RESET>,
2064 + <&gcc PCIE_PCI_RESET>,
2065 + <&gcc PCIE_PHY_RESET>,
2066 + <&gcc PCIE_EXT_RESET>;
2067 + reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
2069 + pinctrl-0 = <&pcie0_pins>;
2070 + pinctrl-names = "default";
2072 + perst-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
2074 + status = "disabled";
2077 + pcie1: pci@1b700000 {
2078 + compatible = "qcom,pcie-v0";
2079 + reg = <0x1b700000 0x1000
2082 + 0x31f00000 0x100000>;
2083 + reg-names = "dbi", "elbi", "parf", "config";
2084 + device_type = "pci";
2085 + linux,pci-domain = <1>;
2086 + bus-range = <0x00 0xff>;
2088 + #address-cells = <3>;
2089 + #size-cells = <2>;
2091 + ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */
2092 + 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
2094 + interrupts = <GIC_SPI 57 IRQ_TYPE_NONE>;
2095 + interrupt-names = "msi";
2096 + #interrupt-cells = <1>;
2097 + interrupt-map-mask = <0 0 0 0x7>;
2098 + interrupt-map = <0 0 0 1 &intc 0 58 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2099 + <0 0 0 2 &intc 0 59 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
2100 + <0 0 0 3 &intc 0 60 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
2101 + <0 0 0 4 &intc 0 61 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
2103 + clocks = <&gcc PCIE_1_A_CLK>,
2104 + <&gcc PCIE_1_H_CLK>,
2105 + <&gcc PCIE_1_PHY_CLK>,
2106 + <&gcc PCIE_1_AUX_CLK>,
2107 + <&gcc PCIE_1_ALT_REF_CLK>;
2108 + clock-names = "core", "iface", "phy", "aux", "ref";
2110 + assigned-clocks = <&gcc PCIE_1_ALT_REF_CLK>;
2111 + assigned-clock-rates = <100000000>;
2113 + resets = <&gcc PCIE_1_ACLK_RESET>,
2114 + <&gcc PCIE_1_HCLK_RESET>,
2115 + <&gcc PCIE_1_POR_RESET>,
2116 + <&gcc PCIE_1_PCI_RESET>,
2117 + <&gcc PCIE_1_PHY_RESET>,
2118 + <&gcc PCIE_1_EXT_RESET>;
2119 + reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
2121 + pinctrl-0 = <&pcie1_pins>;
2122 + pinctrl-names = "default";
2124 + perst-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
2126 + status = "disabled";
2129 + pcie2: pci@1b900000 {
2130 + compatible = "qcom,pcie-v0";
2131 + reg = <0x1b900000 0x1000
2134 + 0x35f00000 0x100000>;
2135 + reg-names = "dbi", "elbi", "parf", "config";
2136 + device_type = "pci";
2137 + linux,pci-domain = <2>;
2138 + bus-range = <0x00 0xff>;
2140 + #address-cells = <3>;
2141 + #size-cells = <2>;
2143 + ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */
2144 + 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
2146 + interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>;
2147 + interrupt-names = "msi";
2148 + #interrupt-cells = <1>;
2149 + interrupt-map-mask = <0 0 0 0x7>;
2150 + interrupt-map = <0 0 0 1 &intc 0 72 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
2151 + <0 0 0 2 &intc 0 73 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
2152 + <0 0 0 3 &intc 0 74 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
2153 + <0 0 0 4 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
2155 + clocks = <&gcc PCIE_2_A_CLK>,
2156 + <&gcc PCIE_2_H_CLK>,
2157 + <&gcc PCIE_2_PHY_CLK>,
2158 + <&gcc PCIE_2_AUX_CLK>,
2159 + <&gcc PCIE_2_ALT_REF_CLK>;
2160 + clock-names = "core", "iface", "phy", "aux", "ref";
2162 + assigned-clocks = <&gcc PCIE_2_ALT_REF_CLK>;
2163 + assigned-clock-rates = <100000000>;
2165 + resets = <&gcc PCIE_2_ACLK_RESET>,
2166 + <&gcc PCIE_2_HCLK_RESET>,
2167 + <&gcc PCIE_2_POR_RESET>,
2168 + <&gcc PCIE_2_PCI_RESET>,
2169 + <&gcc PCIE_2_PHY_RESET>,
2170 + <&gcc PCIE_2_EXT_RESET>;
2171 + reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
2173 + pinctrl-0 = <&pcie2_pins>;
2174 + pinctrl-names = "default";
2176 + perst-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
2178 + status = "disabled";
2181 adm_dma: dma@18300000 {
2182 compatible = "qcom,adm";
2183 reg = <0x18300000 0x100000>;
2184 - interrupts = <GIC_SPI 170 IRQ_TYPE_NONE>;
2185 + interrupts = <0 170 0>;
2188 clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
2193 - compatible = "qcom,ipq806x-nand";
2194 + compatible = "qcom,ebi2-nandc";
2195 reg = <0x1ac00000 0x800>;
2197 clocks = <&gcc EBI2_CLK>,
2198 @@ -380,5 +918,103 @@
2199 status = "disabled";
2202 + nss_common: syscon@03000000 {
2203 + compatible = "syscon";
2204 + reg = <0x03000000 0x0000FFFF>;
2207 + qsgmii_csr: syscon@1bb00000 {
2208 + compatible = "syscon";
2209 + reg = <0x1bb00000 0x000001FF>;
2212 + gmac0: ethernet@37000000 {
2213 + device_type = "network";
2214 + compatible = "qcom,ipq806x-gmac";
2215 + reg = <0x37000000 0x200000>;
2216 + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
2217 + interrupt-names = "macirq";
2219 + qcom,nss-common = <&nss_common>;
2220 + qcom,qsgmii-csr = <&qsgmii_csr>;
2222 + clocks = <&gcc GMAC_CORE1_CLK>;
2223 + clock-names = "stmmaceth";
2225 + resets = <&gcc GMAC_CORE1_RESET>;
2226 + reset-names = "stmmaceth";
2228 + status = "disabled";
2231 + gmac1: ethernet@37200000 {
2232 + device_type = "network";
2233 + compatible = "qcom,ipq806x-gmac";
2234 + reg = <0x37200000 0x200000>;
2235 + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
2236 + interrupt-names = "macirq";
2238 + qcom,nss-common = <&nss_common>;
2239 + qcom,qsgmii-csr = <&qsgmii_csr>;
2241 + clocks = <&gcc GMAC_CORE2_CLK>;
2242 + clock-names = "stmmaceth";
2244 + resets = <&gcc GMAC_CORE2_RESET>;
2245 + reset-names = "stmmaceth";
2247 + status = "disabled";
2250 + gmac2: ethernet@37400000 {
2251 + device_type = "network";
2252 + compatible = "qcom,ipq806x-gmac";
2253 + reg = <0x37400000 0x200000>;
2254 + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
2255 + interrupt-names = "macirq";
2257 + qcom,nss-common = <&nss_common>;
2258 + qcom,qsgmii-csr = <&qsgmii_csr>;
2260 + clocks = <&gcc GMAC_CORE3_CLK>;
2261 + clock-names = "stmmaceth";
2263 + resets = <&gcc GMAC_CORE3_RESET>;
2264 + reset-names = "stmmaceth";
2266 + status = "disabled";
2269 + gmac3: ethernet@37600000 {
2270 + device_type = "network";
2271 + compatible = "qcom,ipq806x-gmac";
2272 + reg = <0x37600000 0x200000>;
2273 + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
2274 + interrupt-names = "macirq";
2276 + qcom,nss-common = <&nss_common>;
2277 + qcom,qsgmii-csr = <&qsgmii_csr>;
2279 + clocks = <&gcc GMAC_CORE4_CLK>;
2280 + clock-names = "stmmaceth";
2282 + resets = <&gcc GMAC_CORE4_RESET>;
2283 + reset-names = "stmmaceth";
2285 + status = "disabled";
2289 + sfpb_mutex: sfpb-mutex {
2290 + compatible = "qcom,sfpb-mutex";
2291 + syscon = <&sfpb_mutex_block 4 4>;
2293 + #hwlock-cells = <1>;
2297 + compatible = "qcom,smem";
2298 + memory-region = <&smem>;
2299 + hwlocks = <&sfpb_mutex 3>;
2303 +++ b/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
2305 +#include "qcom-ipq8064-v1.0.dtsi"
2307 +#include <dt-bindings/input/input.h>
2310 + model = "Linksys EA8500 WiFi Router";
2311 + compatible = "linksys,ea8500", "qcom,ipq8064";
2314 + reg = <0x42000000 0x1e000000>;
2315 + device_type = "memory";
2319 + #address-cells = <1>;
2320 + #size-cells = <1>;
2323 + reg = <0x41200000 0x300000>;
2330 + mdio-gpio0 = &mdio0;
2332 + led-boot = &power;
2333 + led-failsafe = &power;
2334 + led-running = &power;
2335 + led-upgrade = &power;
2339 + bootargs = "console=ttyMSM0,115200n8";
2340 + linux,stdout-path = "serial0:115200n8";
2341 + append-rootblock = "ubi.mtd="; /* append to bootargs adding the root deviceblock nbr from bootloader */
2346 + button_pins: button_pins {
2348 + pins = "gpio65", "gpio67", "gpio68";
2349 + function = "gpio";
2350 + drive-strength = <2>;
2355 + i2c4_pins: i2c4_pinmux {
2357 + pins = "gpio12", "gpio13";
2358 + function = "gsbi4";
2359 + drive-strength = <12>;
2364 + led_pins: led_pins {
2366 + pins = "gpio6", "gpio53", "gpio54";
2367 + function = "gpio";
2368 + drive-strength = <2>;
2373 + mdio0_pins: mdio0_pins {
2375 + pins = "gpio0", "gpio1";
2376 + function = "gpio";
2377 + drive-strength = <8>;
2382 + nand_pins: nand_pins {
2384 + pins = "gpio34", "gpio35", "gpio36",
2385 + "gpio37", "gpio38", "gpio39",
2386 + "gpio40", "gpio41", "gpio42",
2387 + "gpio43", "gpio44", "gpio45",
2388 + "gpio46", "gpio47";
2389 + function = "nand";
2390 + drive-strength = <10>;
2398 + pins = "gpio40", "gpio41", "gpio42",
2399 + "gpio43", "gpio44", "gpio45",
2400 + "gpio46", "gpio47";
2405 + rgmii2_pins: rgmii2_pins {
2407 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
2408 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
2409 + function = "rgmii2";
2410 + drive-strength = <8>;
2417 + qcom,mode = <GSBI_PROT_I2C_UART>;
2423 + * The i2c device on gsbi4 should not be enabled.
2424 + * On ipq806x designs gsbi4 i2c is meant for exclusive
2425 + * RPM usage. Turning this on in kernel manifests as
2426 + * i2c failure for the RPM.
2430 + sata-phy@1b400000 {
2438 + phy@100f8800 { /* USB3 port 1 HS phy */
2442 + phy@100f8830 { /* USB3 port 1 SS phy */
2446 + phy@110f8800 { /* USB3 port 0 HS phy */
2450 + phy@110f8830 { /* USB3 port 0 SS phy */
2462 + pcie0: pci@1b500000 {
2464 + phy-tx0-term-offset = <7>;
2467 + pcie1: pci@1b700000 {
2469 + phy-tx0-term-offset = <7>;
2472 + pcie2: pci@1b900000 {
2474 + phy-tx0-term-offset = <7>;
2480 + pinctrl-0 = <&nand_pins>;
2481 + pinctrl-names = "default";
2483 + nand-ecc-strength = <4>;
2484 + nand-bus-width = <8>;
2486 + #address-cells = <1>;
2487 + #size-cells = <1>;
2491 + reg = <0x0000000 0x0040000>;
2497 + reg = <0x0040000 0x0140000>;
2503 + reg = <0x0180000 0x0140000>;
2509 + reg = <0x02c0000 0x0280000>;
2513 + DDRCONFIG@540000 {
2514 + label = "DDRCONFIG";
2515 + reg = <0x0540000 0x0120000>;
2521 + reg = <0x0660000 0x0120000>;
2527 + reg = <0x0780000 0x0280000>;
2533 + reg = <0x0a00000 0x0280000>;
2539 + reg = <0x0c80000 0x0140000>;
2545 + reg = <0x0dc0000 0x0100000>;
2551 + reg = <0x0ec0000 0x0040000>;
2556 + reg = <0x0f00000 0x0040000>;
2560 + label = "devinfo";
2561 + reg = <0x0f40000 0x0040000>;
2565 + label = "kernel1";
2566 + reg = <0x0f80000 0x2800000>; /* 3 MB spill to rootfs*/
2570 + label = "rootfs1";
2571 + reg = <0x1280000 0x2500000>;
2575 + label = "kernel2";
2576 + reg = <0x3780000 0x2800000>;
2580 + label = "rootfs2";
2581 + reg = <0x3a80000 0x2500000>;
2586 + reg = <0x5f80000 0x2080000>;
2591 + compatible = "virtual,mdio-gpio";
2592 + #address-cells = <1>;
2593 + #size-cells = <0>;
2594 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
2595 + pinctrl-0 = <&mdio0_pins>;
2596 + pinctrl-names = "default";
2598 + phy0: ethernet-phy@0 {
2599 + device_type = "ethernet-phy";
2601 + qca,ar8327-initvals = <
2602 + 0x00004 0x7600000 /* PAD0_MODE */
2603 + 0x00008 0x1000000 /* PAD5_MODE */
2604 + 0x0000c 0x80 /* PAD6_MODE */
2605 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
2606 + 0x000e0 0xc74164de /* SGMII_CTRL */
2607 + 0x0007c 0x4e /* PORT0_STATUS */
2608 + 0x00094 0x4e /* PORT6_STATUS */
2612 + phy4: ethernet-phy@4 {
2613 + device_type = "ethernet-phy";
2618 + gmac1: ethernet@37200000 {
2620 + phy-mode = "rgmii";
2622 + qcom,phy_mdio_addr = <4>;
2623 + qcom,poll_required = <1>;
2624 + qcom,rgmii_delay = <0>;
2625 + qcom,emulation = <0>;
2626 + pinctrl-0 = <&rgmii2_pins>;
2627 + pinctrl-names = "default";
2634 + gmac2: ethernet@37400000 {
2636 + phy-mode = "sgmii";
2638 + qcom,phy_mdio_addr = <0>; /* none */
2639 + qcom,poll_required = <0>; /* no polling */
2640 + qcom,rgmii_delay = <0>;
2641 + qcom,emulation = <0>;
2649 + pinctrl-0 = <&i2c4_pins>;
2650 + pinctrl-names = "default";
2653 + adm_dma: dma@18300000 {
2659 + compatible = "gpio-keys";
2660 + pinctrl-0 = <&button_pins>;
2661 + pinctrl-names = "default";
2665 + gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
2666 + linux,code = <KEY_RFKILL>;
2671 + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
2672 + linux,code = <KEY_RESTART >;
2677 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
2678 + linux,code = <KEY_WPS_BUTTON>;
2683 + compatible = "gpio-leds";
2684 + pinctrl-0 = <&led_pins>;
2685 + pinctrl-names = "default";
2688 + label = "ea8500:green:wps";
2689 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
2693 + label = "ea8500:white:power";
2694 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
2695 + default-state = "keep";
2699 + label = "ea8500:green:wifi";
2700 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>;
2705 +++ b/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
2707 +#include "qcom-ipq8064-v1.0.dtsi"
2709 +#include <dt-bindings/input/input.h>
2712 + model = "Netgear Nighthawk X4 R7500";
2713 + compatible = "netgear,r7500", "qcom,ipq8064";
2716 + reg = <0x42000000 0xe000000>;
2717 + device_type = "memory";
2721 + #address-cells = <1>;
2722 + #size-cells = <1>;
2725 + reg = <0x41200000 0x300000>;
2732 + mdio-gpio0 = &mdio0;
2734 + led-boot = &power_white;
2735 + led-failsafe = &power_amber;
2736 + led-running = &power_white;
2737 + led-upgrade = &power_amber;
2741 + bootargs = "rootfstype=squashfs noinitrd";
2742 + linux,stdout-path = "serial0:115200n8";
2747 + button_pins: button_pins {
2749 + pins = "gpio6", "gpio54", "gpio65";
2750 + function = "gpio";
2751 + drive-strength = <2>;
2756 + i2c4_pins: i2c4_pinmux {
2758 + pins = "gpio12", "gpio13";
2759 + function = "gsbi4";
2760 + drive-strength = <12>;
2765 + led_pins: led_pins {
2767 + pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
2768 + "gpio24","gpio26", "gpio53", "gpio64";
2769 + function = "gpio";
2770 + drive-strength = <2>;
2775 + mdio0_pins: mdio0_pins {
2777 + pins = "gpio0", "gpio1";
2778 + function = "gpio";
2779 + drive-strength = <8>;
2784 + nand_pins: nand_pins {
2786 + pins = "gpio34", "gpio35", "gpio36",
2787 + "gpio37", "gpio38", "gpio39",
2788 + "gpio40", "gpio41", "gpio42",
2789 + "gpio43", "gpio44", "gpio45",
2790 + "gpio46", "gpio47";
2791 + function = "nand";
2792 + drive-strength = <10>;
2800 + pins = "gpio40", "gpio41", "gpio42",
2801 + "gpio43", "gpio44", "gpio45",
2802 + "gpio46", "gpio47";
2807 + rgmii2_pins: rgmii2_pins {
2809 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
2810 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
2811 + function = "rgmii2";
2812 + drive-strength = <8>;
2819 + qcom,mode = <GSBI_PROT_I2C_UART>;
2825 + * The i2c device on gsbi4 should not be enabled.
2826 + * On ipq806x designs gsbi4 i2c is meant for exclusive
2827 + * RPM usage. Turning this on in kernel manifests as
2828 + * i2c failure for the RPM.
2832 + sata-phy@1b400000 {
2840 + phy@100f8800 { /* USB3 port 1 HS phy */
2844 + phy@100f8830 { /* USB3 port 1 SS phy */
2848 + phy@110f8800 { /* USB3 port 0 HS phy */
2852 + phy@110f8830 { /* USB3 port 0 SS phy */
2864 + pcie0: pci@1b500000 {
2868 + pcie1: pci@1b700000 {
2875 + pinctrl-0 = <&nand_pins>;
2876 + pinctrl-names = "default";
2878 + nand-ecc-strength = <4>;
2879 + nand-bus-width = <8>;
2881 + #address-cells = <1>;
2882 + #size-cells = <1>;
2885 + label = "qcadata";
2886 + reg = <0x0000000 0x0c80000>;
2892 + reg = <0x0c80000 0x0500000>;
2896 + APPSBLENV@1180000 {
2897 + label = "APPSBLENV";
2898 + reg = <0x1180000 0x0080000>;
2902 + art: art@1200000 {
2904 + reg = <0x1200000 0x0140000>;
2910 + reg = <0x1340000 0x0200000>;
2915 + reg = <0x1540000 0x1800000>;
2919 + label = "netgear";
2920 + reg = <0x2d40000 0x0c00000>;
2925 + label = "reserve";
2926 + reg = <0x3940000 0x46c0000>;
2930 + firmware@1340000 {
2931 + label = "firmware";
2932 + reg = <0x1340000 0x1a00000>;
2938 + compatible = "virtual,mdio-gpio";
2939 + #address-cells = <1>;
2940 + #size-cells = <0>;
2941 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
2942 + pinctrl-0 = <&mdio0_pins>;
2943 + pinctrl-names = "default";
2945 + phy0: ethernet-phy@0 {
2946 + device_type = "ethernet-phy";
2948 + qca,ar8327-initvals = <
2949 + 0x00004 0x7600000 /* PAD0_MODE */
2950 + 0x00008 0x1000000 /* PAD5_MODE */
2951 + 0x0000c 0x80 /* PAD6_MODE */
2952 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
2953 + 0x000e0 0xc74164de /* SGMII_CTRL */
2954 + 0x0007c 0x4e /* PORT0_STATUS */
2955 + 0x00094 0x4e /* PORT6_STATUS */
2959 + phy4: ethernet-phy@4 {
2960 + device_type = "ethernet-phy";
2965 + gmac1: ethernet@37200000 {
2967 + phy-mode = "rgmii";
2970 + pinctrl-0 = <&rgmii2_pins>;
2971 + pinctrl-names = "default";
2973 + mtd-mac-address = <&art 6>;
2981 + gmac2: ethernet@37400000 {
2983 + phy-mode = "sgmii";
2986 + mtd-mac-address = <&art 0>;
2995 + pinctrl-0 = <&i2c4_pins>;
2996 + pinctrl-names = "default";
3001 + compatible = "gpio-keys";
3002 + pinctrl-0 = <&button_pins>;
3003 + pinctrl-names = "default";
3007 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
3008 + linux,code = <KEY_RFKILL>;
3013 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
3014 + linux,code = <KEY_RESTART>;
3019 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
3020 + linux,code = <KEY_WPS_BUTTON>;
3025 + compatible = "gpio-leds";
3026 + pinctrl-0 = <&led_pins>;
3027 + pinctrl-names = "default";
3030 + label = "r7500:white:usb1";
3031 + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
3035 + label = "r7500:white:usb2";
3036 + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
3039 + power_amber: power_amber {
3040 + label = "r7500:amber:power";
3041 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
3045 + label = "r7500:white:wan";
3046 + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
3050 + label = "r7500:amber:wan";
3051 + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
3055 + label = "r7500:white:wps";
3056 + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
3060 + label = "r7500:white:esata";
3061 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
3064 + power_white: power_white {
3065 + label = "r7500:white:power";
3066 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
3067 + default-state = "keep";
3071 + label = "r7500:white:wifi";
3072 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
3081 +++ b/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
3083 +#include "qcom-ipq8064-v1.0.dtsi"
3085 +#include <dt-bindings/input/input.h>
3088 + model = "Netgear Nighthawk X4 R7500v2";
3089 + compatible = "netgear,r7500v2", "qcom,ipq8064";
3092 + reg = <0x42000000 0x1e000000>;
3093 + device_type = "memory";
3097 + #address-cells = <1>;
3098 + #size-cells = <1>;
3101 + reg = <0x41200000 0x300000>;
3106 + reg = <0x5fe00000 0x200000>;
3113 + mdio-gpio0 = &mdio0;
3115 + led-boot = &power;
3116 + led-failsafe = &power;
3117 + led-running = &power;
3118 + led-upgrade = &power;
3122 + bootargs = "rootfstype=squashfs noinitrd";
3123 + linux,stdout-path = "serial0:115200n8";
3128 + button_pins: button_pins {
3130 + pins = "gpio6", "gpio54", "gpio65";
3131 + function = "gpio";
3132 + drive-strength = <2>;
3137 + i2c4_pins: i2c4_pinmux {
3139 + pins = "gpio12", "gpio13";
3140 + function = "gsbi4";
3141 + drive-strength = <12>;
3146 + led_pins: led_pins {
3148 + pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
3149 + "gpio24","gpio26", "gpio53", "gpio64";
3150 + function = "gpio";
3151 + drive-strength = <2>;
3156 + mdio0_pins: mdio0_pins {
3158 + pins = "gpio0", "gpio1";
3159 + function = "gpio";
3160 + drive-strength = <8>;
3165 + nand_pins: nand_pins {
3167 + pins = "gpio34", "gpio35", "gpio36",
3168 + "gpio37", "gpio38", "gpio39",
3169 + "gpio40", "gpio41", "gpio42",
3170 + "gpio43", "gpio44", "gpio45",
3171 + "gpio46", "gpio47";
3172 + function = "nand";
3173 + drive-strength = <10>;
3181 + pins = "gpio40", "gpio41", "gpio42",
3182 + "gpio43", "gpio44", "gpio45",
3183 + "gpio46", "gpio47";
3188 + rgmii2_pins: rgmii2_pins {
3190 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
3191 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
3192 + function = "rgmii2";
3193 + drive-strength = <8>;
3198 + usb0_pwr_en_pins: usb0_pwr_en_pins {
3201 + function = "gpio";
3202 + drive-strength = <12>;
3208 + usb1_pwr_en_pins: usb1_pwr_en_pins {
3210 + pins = "gpio16", "gpio68";
3211 + function = "gpio";
3212 + drive-strength = <12>;
3220 + qcom,mode = <GSBI_PROT_I2C_UART>;
3226 + * The i2c device on gsbi4 should not be enabled.
3227 + * On ipq806x designs gsbi4 i2c is meant for exclusive
3228 + * RPM usage. Turning this on in kernel manifests as
3229 + * i2c failure for the RPM.
3233 + sata-phy@1b400000 {
3241 + phy@100f8800 { /* USB3 port 1 HS phy */
3245 + phy@100f8830 { /* USB3 port 1 SS phy */
3249 + phy@110f8800 { /* USB3 port 0 HS phy */
3253 + phy@110f8830 { /* USB3 port 0 SS phy */
3260 + pinctrl-0 = <&usb0_pwr_en_pins>;
3261 + pinctrl-names = "default";
3267 + pinctrl-0 = <&usb1_pwr_en_pins>;
3268 + pinctrl-names = "default";
3271 + pcie0: pci@1b500000 {
3273 + reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
3274 + pinctrl-0 = <&pcie0_pins>;
3275 + pinctrl-names = "default";
3278 + pcie1: pci@1b700000 {
3280 + reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
3281 + pinctrl-0 = <&pcie1_pins>;
3282 + pinctrl-names = "default";
3288 + pinctrl-0 = <&nand_pins>;
3289 + pinctrl-names = "default";
3291 + nand-ecc-strength = <4>;
3292 + nand-bus-width = <8>;
3294 + #address-cells = <1>;
3295 + #size-cells = <1>;
3298 + label = "qcadata";
3299 + reg = <0x0000000 0x0c80000>;
3305 + reg = <0x0c80000 0x0500000>;
3309 + APPSBLENV@1180000 {
3310 + label = "APPSBLENV";
3311 + reg = <0x1180000 0x0080000>;
3315 + art: art@1200000 {
3317 + reg = <0x1200000 0x0140000>;
3321 + artbak: art@1340000 {
3323 + reg = <0x1340000 0x0140000>;
3329 + reg = <0x1480000 0x0200000>;
3334 + reg = <0x1680000 0x1E00000>;
3338 + label = "netgear";
3339 + reg = <0x3480000 0x4480000>;
3344 + label = "reserve";
3345 + reg = <0x7900000 0x0700000>;
3349 + firmware@1480000 {
3350 + label = "firmware";
3351 + reg = <0x1480000 0x2000000>;
3357 + compatible = "virtual,mdio-gpio";
3358 + #address-cells = <1>;
3359 + #size-cells = <0>;
3360 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
3361 + pinctrl-0 = <&mdio0_pins>;
3362 + pinctrl-names = "default";
3364 + phy0: ethernet-phy@0 {
3365 + device_type = "ethernet-phy";
3367 + qca,ar8327-initvals = <
3368 + 0x00004 0x7600000 /* PAD0_MODE */
3369 + 0x00008 0x1000000 /* PAD5_MODE */
3370 + 0x0000c 0x80 /* PAD6_MODE */
3371 + 0x000e4 0xaa545 /* MAC_POWER_SEL */
3372 + 0x000e0 0xc74164de /* SGMII_CTRL */
3373 + 0x0007c 0x4e /* PORT0_STATUS */
3374 + 0x00094 0x4e /* PORT6_STATUS */
3378 + phy4: ethernet-phy@4 {
3379 + device_type = "ethernet-phy";
3384 + gmac1: ethernet@37200000 {
3386 + phy-mode = "rgmii";
3389 + pinctrl-0 = <&rgmii2_pins>;
3390 + pinctrl-names = "default";
3392 + mtd-mac-address = <&art 6>;
3400 + gmac2: ethernet@37400000 {
3402 + phy-mode = "sgmii";
3405 + mtd-mac-address = <&art 0>;
3414 + pinctrl-0 = <&i2c4_pins>;
3415 + pinctrl-names = "default";
3420 + compatible = "gpio-keys";
3421 + pinctrl-0 = <&button_pins>;
3422 + pinctrl-names = "default";
3426 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
3427 + linux,code = <KEY_RFKILL>;
3432 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
3433 + linux,code = <KEY_RESTART>;
3438 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
3439 + linux,code = <KEY_WPS_BUTTON>;
3444 + compatible = "gpio-leds";
3445 + pinctrl-0 = <&led_pins>;
3446 + pinctrl-names = "default";
3449 + label = "r7500v2:amber:usb1";
3450 + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
3454 + label = "r7500v2:amber:usb3";
3455 + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
3459 + label = "r7500v2:amber:status";
3460 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
3464 + label = "r7500v2:white:internet";
3465 + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
3469 + label = "r7500v2:white:wan";
3470 + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
3474 + label = "r7500v2:white:wps";
3475 + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
3479 + label = "r7500v2:white:esata";
3480 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
3484 + label = "r7500v2:white:power";
3485 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
3486 + default-state = "keep";
3490 + label = "r7500v2:white:wifi";
3491 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
3500 +++ b/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
3502 +#include "qcom-ipq8064-v1.0.dtsi"
3504 +#include <dt-bindings/input/input.h>
3507 + model = "TP-Link Archer VR2600v";
3508 + compatible = "tplink,vr2600v", "qcom,ipq8064";
3511 + reg = <0x42000000 0x1e000000>;
3512 + device_type = "memory";
3516 + #address-cells = <1>;
3517 + #size-cells = <1>;
3520 + reg = <0x41200000 0x300000>;
3527 + mdio-gpio0 = &mdio0;
3529 + led-boot = &power;
3530 + led-failsafe = &general;
3531 + led-running = &power;
3532 + led-upgrade = &general;
3536 + linux,stdout-path = "serial0:115200n8";
3541 + led_pins: led_pins {
3543 + pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17",
3544 + "gpio26", "gpio53", "gpio56", "gpio66";
3545 + function = "gpio";
3546 + drive-strength = <2>;
3551 + i2c4_pins: i2c4_pinmux {
3553 + pins = "gpio12", "gpio13";
3554 + function = "gsbi4";
3555 + drive-strength = <12>;
3560 + button_pins: button_pins {
3562 + pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68";
3563 + function = "gpio";
3564 + drive-strength = <2>;
3569 + spi_pins: spi_pins {
3571 + pins = "gpio18", "gpio19", "gpio21";
3572 + function = "gsbi5";
3577 + pins = "gpio18", "gpio19";
3578 + drive-strength = <10>;
3583 + drive-strength = <10>;
3589 + drive-strength = <12>;
3593 + mdio0_pins: mdio0_pins {
3595 + pins = "gpio0", "gpio1";
3596 + function = "gpio";
3597 + drive-strength = <8>;
3602 + rgmii2_pins: rgmii2_pins {
3604 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
3605 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
3606 + function = "rgmii2";
3607 + drive-strength = <8>;
3614 + qcom,mode = <GSBI_PROT_I2C_UART>;
3620 + * The i2c device on gsbi4 should not be enabled.
3621 + * On ipq806x designs gsbi4 i2c is meant for exclusive
3622 + * RPM usage. Turning this on in kernel manifests as
3623 + * i2c failure for the RPM.
3627 + gsbi5: gsbi@1a200000 {
3628 + qcom,mode = <GSBI_PROT_SPI>;
3631 + spi4: spi@1a280000 {
3634 + pinctrl-0 = <&spi_pins>;
3635 + pinctrl-names = "default";
3637 + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
3639 + flash: W25Q128@0 {
3640 + compatible = "jedec,spi-nor";
3641 + #address-cells = <1>;
3642 + #size-cells = <1>;
3643 + spi-max-frequency = <50000000>;
3648 + reg = <0x0 0x20000>;
3654 + reg = <0x20000 0x20000>;
3660 + reg = <0x40000 0x40000>;
3666 + reg = <0x80000 0x80000>;
3670 + DDRCONFIG@100000 {
3671 + label = "DDRCONFIG";
3672 + reg = <0x100000 0x10000>;
3678 + reg = <0x110000 0x10000>;
3684 + reg = <0x120000 0x80000>;
3690 + reg = <0x1a0000 0x80000>;
3696 + reg = <0x220000 0x80000>;
3700 + APPSBLENV@2a0000 {
3701 + label = "APPSBLENV";
3702 + reg = <0x2a0000 0x40000>;
3708 + reg = <0x2e0000 0x40000>;
3714 + reg = <0x320000 0x200000>;
3719 + reg = <0x520000 0xa60000>;
3722 + defaultmac: default-mac@0xfaf100 {
3723 + label = "default-mac";
3724 + reg = <0xfaf100 0x00200>;
3730 + reg = <0xfc0000 0x40000>;
3737 + phy@100f8800 { /* USB3 port 1 HS phy */
3741 + phy@100f8830 { /* USB3 port 1 SS phy */
3745 + phy@110f8800 { /* USB3 port 0 HS phy */
3749 + phy@110f8830 { /* USB3 port 0 SS phy */
3761 + pcie0: pci@1b500000 {
3763 + phy-tx0-term-offset = <7>;
3766 + pcie1: pci@1b700000 {
3768 + phy-tx0-term-offset = <7>;
3772 + compatible = "virtual,mdio-gpio";
3773 + #address-cells = <1>;
3774 + #size-cells = <0>;
3775 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
3776 + pinctrl-0 = <&mdio0_pins>;
3777 + pinctrl-names = "default";
3779 + phy0: ethernet-phy@0 {
3780 + device_type = "ethernet-phy";
3782 + qca,ar8327-initvals = <
3783 + 0x00004 0x7600000 /* PAD0_MODE */
3784 + 0x00008 0x1000000 /* PAD5_MODE */
3785 + 0x0000c 0x80 /* PAD6_MODE */
3786 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
3787 + 0x000e0 0xc74164de /* SGMII_CTRL */
3788 + 0x0007c 0x4e /* PORT0_STATUS */
3789 + 0x00094 0x4e /* PORT6_STATUS */
3793 + phy4: ethernet-phy@4 {
3794 + device_type = "ethernet-phy";
3799 + gmac1: ethernet@37200000 {
3801 + phy-mode = "rgmii";
3804 + pinctrl-0 = <&rgmii2_pins>;
3805 + pinctrl-names = "default";
3807 + mtd-mac-address = <&defaultmac 0>;
3808 + mtd-mac-address-increment = <1>;
3816 + gmac2: ethernet@37400000 {
3818 + phy-mode = "sgmii";
3821 + mtd-mac-address = <&defaultmac 0>;
3830 + pinctrl-0 = <&i2c4_pins>;
3831 + pinctrl-names = "default";
3836 + compatible = "gpio-keys";
3837 + pinctrl-0 = <&button_pins>;
3838 + pinctrl-names = "default";
3842 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
3843 + linux,code = <KEY_RFKILL>;
3848 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
3849 + linux,code = <KEY_RESTART>;
3854 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
3855 + linux,code = <KEY_WPS_BUTTON>;
3860 + gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
3861 + linux,code = <KEY_PHONE>;
3865 + label = "ledswitch";
3866 + gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
3867 + linux,code = <KEY_LIGHTS_TOGGLE>;
3872 + compatible = "gpio-leds";
3873 + pinctrl-0 = <&led_pins>;
3874 + pinctrl-names = "default";
3877 + label = "vr2600v:white:dsl";
3878 + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
3882 + label = "vr2600v:white:usb";
3883 + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
3887 + label = "vr2600v:white:lan";
3888 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
3892 + label = "vr2600v:white:wlan2g";
3893 + gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
3897 + label = "vr2600v:white:wlan5g";
3898 + gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>;
3902 + label = "vr2600v:white:power";
3903 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
3904 + default-state = "keep";
3908 + label = "vr2600v:white:phone";
3909 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
3913 + label = "vr2600v:white:wan";
3914 + gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
3917 + general: general {
3918 + label = "vr2600v:white:general";
3919 + gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
3928 +++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
3930 +#include "qcom-ipq8064.dtsi"
3933 + model = "Qualcomm IPQ8065";
3934 + compatible = "qcom,ipq8065", "qcom,ipq8064";
3937 + qcom,pvs-format-a;
3938 + qcom,speed0-pvs0-bin-v0 =
3939 + < 1725000000 1262500 >,
3940 + < 1400000000 1175000 >,
3941 + < 1000000000 1100000 >,
3942 + < 800000000 1050000 >,
3943 + < 600000000 1000000 >,
3944 + < 384000000 975000 >;
3945 + qcom,speed0-pvs1-bin-v0 =
3946 + < 1725000000 1225000 >,
3947 + < 1400000000 1150000 >,
3948 + < 1000000000 1075000 >,
3949 + < 800000000 1025000 >,
3950 + < 600000000 975000 >,
3951 + < 384000000 950000 >;
3952 + qcom,speed0-pvs2-bin-v0 =
3953 + < 1725000000 1200000 >,
3954 + < 1400000000 1125000 >,
3955 + < 1000000000 1050000 >,
3956 + < 800000000 1000000 >,
3957 + < 600000000 950000 >,
3958 + < 384000000 925000 >;
3959 + qcom,speed0-pvs3-bin-v0 =
3960 + < 1725000000 1175000 >,
3961 + < 1400000000 1100000 >,
3962 + < 1000000000 1025000 >,
3963 + < 800000000 975000 >,
3964 + < 600000000 925000 >,
3965 + < 384000000 900000 >;
3966 + qcom,speed0-pvs4-bin-v0 =
3967 + < 1725000000 1150000 >,
3968 + < 1400000000 1075000 >,
3969 + < 1000000000 1000000 >,
3970 + < 800000000 950000 >,
3971 + < 600000000 900000 >,
3972 + < 384000000 875000 >;
3973 + qcom,speed0-pvs5-bin-v0 =
3974 + < 1725000000 1100000 >,
3975 + < 1400000000 1025000 >,
3976 + < 1000000000 950000 >,
3977 + < 800000000 900000 >,
3978 + < 600000000 850000 >,
3979 + < 384000000 825000 >;
3980 + qcom,speed0-pvs6-bin-v0 =
3981 + < 1725000000 1050000 >,
3982 + < 1400000000 975000 >,
3983 + < 1000000000 900000 >,
3984 + < 800000000 850000 >,
3985 + < 600000000 800000 >,
3986 + < 384000000 775000 >;
3996 + regulator-min-microvolt = <775000>;
3997 + regulator-max-microvolt = <1275000>;
4001 + regulator-min-microvolt = <775000>;
4002 + regulator-max-microvolt = <1275000>;
4007 + /* Temporary fixed regulator */
4008 + vsdcc_fixed: vsdcc-regulator {
4009 + compatible = "regulator-fixed";
4010 + regulator-name = "SDCC Power";
4011 + regulator-min-microvolt = <3300000>;
4012 + regulator-max-microvolt = <3300000>;
4013 + regulator-always-on;
4016 + sdcc1bam:dma@12402000 {
4017 + compatible = "qcom,bam-v1.3.0";
4018 + reg = <0x12402000 0x8000>;
4019 + interrupts = <0 98 0>;
4020 + clocks = <&gcc SDC1_H_CLK>;
4021 + clock-names = "bam_clk";
4026 + sdcc3bam:dma@12182000 {
4027 + compatible = "qcom,bam-v1.3.0";
4028 + reg = <0x12182000 0x8000>;
4029 + interrupts = <0 96 0>;
4030 + clocks = <&gcc SDC3_H_CLK>;
4031 + clock-names = "bam_clk";
4037 + compatible = "arm,amba-bus";
4038 + #address-cells = <1>;
4039 + #size-cells = <1>;
4041 + sdcc1: sdcc@12400000 {
4042 + status = "disabled";
4043 + compatible = "arm,pl18x", "arm,primecell";
4044 + arm,primecell-periphid = <0x00051180>;
4045 + reg = <0x12400000 0x2000>;
4046 + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
4047 + interrupt-names = "cmd_irq";
4048 + clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>;
4049 + clock-names = "mclk", "apb_pclk";
4051 + max-frequency = <96000000>;
4054 + cap-mmc-highspeed;
4055 + vmmc-supply = <&vsdcc_fixed>;
4056 + dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
4057 + dma-names = "tx", "rx";
4060 + sdcc3: sdcc@12180000 {
4061 + compatible = "arm,pl18x", "arm,primecell";
4062 + arm,primecell-periphid = <0x00051180>;
4063 + status = "disabled";
4064 + reg = <0x12180000 0x2000>;
4065 + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
4066 + interrupt-names = "cmd_irq";
4067 + clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>;
4068 + clock-names = "mclk", "apb_pclk";
4071 + cap-mmc-highspeed;
4072 + max-frequency = <192000000>;
4076 + vqmmc-supply = <&vsdcc_fixed>;
4077 + dmas = <&sdcc3bam 2>, <&sdcc3bam 1>;
4078 + dma-names = "tx", "rx";
4084 +++ b/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
4086 +#include "qcom-ipq8065-v1.0.dtsi"
4088 +#include <dt-bindings/input/input.h>
4091 + model = "ZyXEL NBG6817";
4092 + compatible = "zyxel,nbg6817", "qcom,ipq8065";
4095 + reg = <0x42000000 0x1e000000>;
4096 + device_type = "memory";
4100 + #address-cells = <1>;
4101 + #size-cells = <1>;
4104 + reg = <0x41200000 0x300000>;
4111 + mdio-gpio0 = &mdio0;
4114 + led-boot = &power;
4115 + led-failsafe = &power;
4116 + led-running = &power;
4117 + led-upgrade = &power;
4121 + bootargs = "root=/dev/mmcblk0p5 rootfstype=squashfs,ext4 rootwait noinitrd";
4122 + linux,stdout-path = "serial0:115200n8";
4127 + button_pins: button_pins {
4129 + pins = "gpio6", "gpio54", "gpio65";
4130 + function = "gpio";
4131 + drive-strength = <2>;
4136 + i2c4_pins: i2c4_pinmux {
4138 + pins = "gpio12", "gpio13";
4139 + function = "gsbi4";
4140 + drive-strength = <12>;
4145 + led_pins: led_pins {
4147 + pins = "gpio9", "gpio26", "gpio33", "gpio64";
4148 + function = "gpio";
4149 + drive-strength = <2>;
4154 + mdio0_pins: mdio0_pins {
4156 + pins = "gpio0", "gpio1";
4157 + function = "gpio";
4158 + drive-strength = <8>;
4168 + rgmii2_pins: rgmii2_pins {
4170 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
4171 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
4172 + function = "rgmii2";
4173 + drive-strength = <8>;
4178 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
4183 + spi_pins: spi_pins {
4185 + pins = "gpio18", "gpio19", "gpio21";
4186 + function = "gsbi5";
4187 + drive-strength = <10>;
4193 + drive-strength = <12>;
4197 + usb0_pwr_en_pins: usb0_pwr_en_pins {
4199 + pins = "gpio16", "gpio17";
4200 + function = "gpio";
4201 + drive-strength = <12>;
4216 + usb1_pwr_en_pins: usb1_pwr_en_pins {
4218 + pins = "gpio14", "gpio15";
4219 + function = "gpio";
4220 + drive-strength = <12>;
4237 + qcom,mode = <GSBI_PROT_I2C_UART>;
4243 + * The i2c device on gsbi4 should not be enabled.
4244 + * On ipq806x designs gsbi4 i2c is meant for exclusive
4245 + * RPM usage. Turning this on in kernel manifests as
4246 + * i2c failure for the RPM.
4250 + gsbi5: gsbi@1a200000 {
4251 + qcom,mode = <GSBI_PROT_SPI>;
4254 + spi4: spi@1a280000 {
4257 + pinctrl-0 = <&spi_pins>;
4258 + pinctrl-names = "default";
4260 + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
4263 + compatible = "jedec,spi-nor";
4264 + #address-cells = <1>;
4265 + #size-cells = <1>;
4266 + spi-max-frequency = <51200000>;
4269 + linux,part-probe = "qcom-smem";
4274 + phy@100f8800 { /* USB3 port 1 HS phy */
4278 + phy@100f8830 { /* USB3 port 1 SS phy */
4282 + phy@110f8800 { /* USB3 port 0 HS phy */
4286 + phy@110f8830 { /* USB3 port 0 SS phy */
4293 + pinctrl-0 = <&usb0_pwr_en_pins>;
4294 + pinctrl-names = "default";
4300 + pinctrl-0 = <&usb1_pwr_en_pins>;
4301 + pinctrl-names = "default";
4304 + pcie0: pci@1b500000 {
4306 + reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
4307 + pinctrl-0 = <&pcie0_pins>;
4308 + pinctrl-names = "default";
4311 + pcie1: pci@1b700000 {
4313 + reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
4314 + pinctrl-0 = <&pcie1_pins>;
4315 + pinctrl-names = "default";
4319 + compatible = "virtual,mdio-gpio";
4320 + #address-cells = <1>;
4321 + #size-cells = <0>;
4322 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
4323 + pinctrl-0 = <&mdio0_pins>;
4324 + pinctrl-names = "default";
4326 + phy0: ethernet-phy@0 {
4327 + device_type = "ethernet-phy";
4329 + qca,ar8327-initvals = <
4330 + 0x00004 0x7600000 /* PAD0_MODE */
4331 + 0x00008 0x1000000 /* PAD5_MODE */
4332 + 0x0000c 0x80 /* PAD6_MODE */
4333 + 0x000e4 0xaa545 /* MAC_POWER_SEL */
4334 + 0x000e0 0xc74164de /* SGMII_CTRL */
4335 + 0x0007c 0x4e /* PORT0_STATUS */
4336 + 0x00094 0x4e /* PORT6_STATUS */
4337 + 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
4338 + 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
4339 + 0x00978 0x19008643 /* QM_PORT1_CTRL0 */
4340 + 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
4341 + 0x00980 0x19008643 /* QM_PORT2_CTRL0 */
4342 + 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
4343 + 0x00988 0x19008643 /* QM_PORT3_CTRL0 */
4344 + 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
4345 + 0x00990 0x19008643 /* QM_PORT4_CTRL0 */
4346 + 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
4347 + 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
4348 + 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
4349 + 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
4350 + 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
4354 + phy4: ethernet-phy@4 {
4355 + device_type = "ethernet-phy";
4357 + qca,ar8327-initvals = <
4358 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
4359 + 0x0000c 0x80 /* PAD6_MODE */
4364 + gmac1: ethernet@37200000 {
4366 + phy-mode = "rgmii";
4368 + qcom,phy_mdio_addr = <4>;
4369 + qcom,poll_required = <0>;
4370 + qcom,rgmii_delay = <1>;
4371 + qcom,phy_mii_type = <0>;
4372 + qcom,emulation = <0>;
4374 + mdiobus = <&mdio0>;
4376 + pinctrl-0 = <&rgmii2_pins>;
4377 + pinctrl-names = "default";
4385 + gmac2: ethernet@37400000 {
4387 + phy-mode = "sgmii";
4389 + qcom,phy_mdio_addr = <0>; /* none */
4390 + qcom,poll_required = <0>; /* no polling */
4391 + qcom,rgmii_delay = <0>;
4392 + qcom,phy_mii_type = <1>;
4393 + qcom,emulation = <0>;
4395 + mdiobus = <&mdio0>;
4404 + pinctrl-0 = <&i2c4_pins>;
4405 + pinctrl-names = "default";
4409 + sdcc1: sdcc@12400000 {
4416 + compatible = "gpio-keys";
4417 + pinctrl-0 = <&button_pins>;
4418 + pinctrl-names = "default";
4422 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
4423 + linux,code = <KEY_RFKILL>;
4428 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
4429 + linux,code = <KEY_RESTART>;
4434 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
4435 + linux,code = <KEY_WPS_BUTTON>;
4440 + compatible = "gpio-leds";
4441 + pinctrl-0 = <&led_pins>;
4442 + pinctrl-names = "default";
4445 + label = "nbg6817:white:internet";
4446 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
4450 + label = "nbg6817:white:power";
4451 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
4452 + default-state = "keep";
4456 + label = "nbg6817:amber:wifi2g";
4457 + gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>;
4460 + /* wifi2g amber from the manual is missing */
4463 + label = "nbg6817:amber:wifi5g";
4464 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
4467 + /* wifi5g amber from the manual is missing */
4475 +++ b/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
4477 +#include "qcom-ipq8065-v1.0.dtsi"
4479 +#include <dt-bindings/input/input.h>
4482 + model = "Netgear Nighthawk X4S R7800";
4483 + compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
4486 + reg = <0x42000000 0x1e000000>;
4487 + device_type = "memory";
4491 + #address-cells = <1>;
4492 + #size-cells = <1>;
4495 + reg = <0x41200000 0x300000>;
4500 + reg = <0x5fe00000 0x200000>;
4507 + mdio-gpio0 = &mdio0;
4509 + led-boot = &power_white;
4510 + led-failsafe = &power_amber;
4511 + led-running = &power_white;
4512 + led-upgrade = &power_amber;
4516 + linux,stdout-path = "serial0:115200n8";
4521 + button_pins: button_pins {
4523 + pins = "gpio6", "gpio54", "gpio65";
4524 + function = "gpio";
4525 + drive-strength = <2>;
4530 + i2c4_pins: i2c4_pinmux {
4532 + pins = "gpio12", "gpio13";
4533 + function = "gsbi4";
4534 + drive-strength = <12>;
4539 + led_pins: led_pins {
4540 + pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
4541 + "gpio24","gpio26", "gpio53", "gpio64";
4542 + function = "gpio";
4543 + drive-strength = <2>;
4547 + nand_pins: nand_pins {
4549 + pins = "gpio34", "gpio35", "gpio36",
4550 + "gpio37", "gpio38", "gpio39",
4551 + "gpio40", "gpio41", "gpio42",
4552 + "gpio43", "gpio44", "gpio45",
4553 + "gpio46", "gpio47";
4554 + function = "nand";
4555 + drive-strength = <10>;
4563 + pins = "gpio40", "gpio41", "gpio42",
4564 + "gpio43", "gpio44", "gpio45",
4565 + "gpio46", "gpio47";
4570 + mdio0_pins: mdio0_pins {
4572 + pins = "gpio0", "gpio1";
4573 + function = "gpio";
4574 + drive-strength = <8>;
4584 + rgmii2_pins: rgmii2_pins {
4586 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
4587 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
4588 + function = "rgmii2";
4589 + drive-strength = <8>;
4594 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
4599 + spi_pins: spi_pins {
4601 + pins = "gpio18", "gpio19", "gpio21";
4602 + function = "gsbi5";
4607 + pins = "gpio18", "gpio19";
4608 + drive-strength = <10>;
4613 + drive-strength = <10>;
4619 + drive-strength = <12>;
4623 + spi6_pins: spi6_pins {
4625 + pins = "gpio55", "gpio56", "gpio58";
4626 + function = "gsbi6";
4632 + drive-strength = <12>;
4637 + drive-strength = <14>;
4642 + drive-strength = <12>;
4648 + drive-strength = <12>;
4653 + drive-strength = <10>;
4659 + usb0_pwr_en_pins: usb0_pwr_en_pins {
4662 + function = "gpio";
4663 + drive-strength = <12>;
4669 + usb1_pwr_en_pins: usb1_pwr_en_pins {
4671 + pins = "gpio16", "gpio68";
4672 + function = "gpio";
4673 + drive-strength = <12>;
4681 + qcom,mode = <GSBI_PROT_I2C_UART>;
4687 + * The i2c device on gsbi4 should not be enabled.
4688 + * On ipq806x designs gsbi4 i2c is meant for exclusive
4689 + * RPM usage. Turning this on in kernel manifests as
4690 + * i2c failure for the RPM.
4694 + gsbi5: gsbi@1a200000 {
4695 + qcom,mode = <GSBI_PROT_SPI>;
4698 + spi5: spi@1a280000 {
4701 + pinctrl-0 = <&spi_pins>;
4702 + pinctrl-names = "default";
4704 + cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
4707 + compatible = "jedec,spi-nor";
4708 + #address-cells = <1>;
4709 + #size-cells = <1>;
4710 + spi-max-frequency = <50000000>;
4713 + linux,part-probe = "qcom-smem";
4718 + gsbi6: gsbi@16500000 {
4719 + qcom,mode = <GSBI_PROT_SPI>;
4721 + spi6: spi@16580000 {
4724 + pinctrl-0 = <&spi6_pins>;
4725 + pinctrl-names = "default";
4727 + cs-gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
4730 + compatible = "jedec,spi-nor";
4732 + spi-max-frequency = <6000000>;
4737 + sata-phy@1b400000 {
4742 + ports-implemented = <0x1>;
4746 + phy@100f8800 { /* USB3 port 1 HS phy */
4750 + phy@100f8830 { /* USB3 port 1 SS phy */
4754 + phy@110f8800 { /* USB3 port 0 HS phy */
4758 + phy@110f8830 { /* USB3 port 0 SS phy */
4765 + pinctrl-0 = <&usb0_pwr_en_pins>;
4766 + pinctrl-names = "default";
4772 + pinctrl-0 = <&usb1_pwr_en_pins>;
4773 + pinctrl-names = "default";
4776 + pcie0: pci@1b500000 {
4778 + phy-tx0-term-offset = <7>;
4781 + pcie1: pci@1b700000 {
4783 + phy-tx0-term-offset = <7>;
4789 + pinctrl-0 = <&nand_pins>;
4790 + pinctrl-names = "default";
4792 + nand-ecc-strength = <4>;
4793 + nand-ecc-step-size = <512>;
4794 + nand-bus-width = <8>;
4796 + #address-cells = <1>;
4797 + #size-cells = <1>;
4800 + label = "qcadata";
4801 + reg = <0x0000000 0x0c80000>;
4807 + reg = <0x0c80000 0x0500000>;
4811 + APPSBLENV@1180000 {
4812 + label = "APPSBLENV";
4813 + reg = <0x1180000 0x0080000>;
4817 + art: art@1200000 {
4819 + reg = <0x1200000 0x0140000>;
4823 + artbak: art@1340000 {
4825 + reg = <0x1340000 0x0140000>;
4831 + reg = <0x1480000 0x0200000>;
4836 + reg = <0x1680000 0x1E00000>;
4840 + label = "netgear";
4841 + reg = <0x3480000 0x4480000>;
4846 + label = "reserve";
4847 + reg = <0x7900000 0x0700000>;
4851 + firmware@1480000 {
4852 + label = "firmware";
4853 + reg = <0x1480000 0x2000000>;
4858 + compatible = "virtual,mdio-gpio";
4859 + #address-cells = <1>;
4860 + #size-cells = <0>;
4861 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
4862 + pinctrl-0 = <&mdio0_pins>;
4863 + pinctrl-names = "default";
4866 + phy0: ethernet-phy@0 {
4867 + device_type = "ethernet-phy";
4869 + qca,ar8327-initvals = <
4870 + 0x00004 0x7600000 /* PAD0_MODE */
4871 + 0x00008 0x1000000 /* PAD5_MODE */
4872 + 0x0000c 0x80 /* PAD6_MODE */
4873 + 0x000e4 0xaa545 /* MAC_POWER_SEL */
4874 + 0x000e0 0xc74164de /* SGMII_CTRL */
4875 + 0x0007c 0x4e /* PORT0_STATUS */
4876 + 0x00094 0x4e /* PORT6_STATUS */
4877 + 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
4878 + 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
4879 + 0x00978 0x19008643 /* QM_PORT1_CTRL0 */
4880 + 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
4881 + 0x00980 0x19008643 /* QM_PORT2_CTRL0 */
4882 + 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
4883 + 0x00988 0x19008643 /* QM_PORT3_CTRL0 */
4884 + 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
4885 + 0x00990 0x19008643 /* QM_PORT4_CTRL0 */
4886 + 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
4887 + 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
4888 + 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
4889 + 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
4890 + 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
4892 + qca,ar8327-vlans = <
4893 + 0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */
4894 + 0x2 0x21 /* VLAN2 Ports 0/5 */
4898 + phy4: ethernet-phy@4 {
4899 + device_type = "ethernet-phy";
4901 + qca,ar8327-initvals = <
4902 + 0x000e4 0x6a545 /* MAC_POWER_SEL */
4903 + 0x0000c 0x80 /* PAD6_MODE */
4908 + gmac1: ethernet@37200000 {
4910 + phy-mode = "rgmii";
4912 + qcom,phy_mdio_addr = <4>;
4913 + qcom,poll_required = <0>;
4914 + qcom,rgmii_delay = <1>;
4915 + qcom,phy_mii_type = <0>;
4916 + qcom,emulation = <0>;
4918 + mdiobus = <&mdio0>;
4920 + pinctrl-0 = <&rgmii2_pins>;
4921 + pinctrl-names = "default";
4923 + mtd-mac-address = <&art 6>;
4931 + gmac2: ethernet@37400000 {
4933 + phy-mode = "sgmii";
4935 + qcom,phy_mdio_addr = <0>; /* none */
4936 + qcom,poll_required = <0>; /* no polling */
4937 + qcom,rgmii_delay = <0>;
4938 + qcom,phy_mii_type = <1>;
4939 + qcom,emulation = <0>;
4941 + mdiobus = <&mdio0>;
4943 + mtd-mac-address = <&art 0>;
4952 + pinctrl-0 = <&i2c4_pins>;
4953 + pinctrl-names = "default";
4958 + compatible = "gpio-keys";
4959 + pinctrl-0 = <&button_pins>;
4960 + pinctrl-names = "default";
4964 + gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
4965 + linux,code = <KEY_RFKILL>;
4966 + debounce-interval = <60>;
4972 + gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
4973 + linux,code = <KEY_RESTART>;
4974 + debounce-interval = <60>;
4980 + gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
4981 + linux,code = <KEY_WPS_BUTTON>;
4982 + debounce-interval = <60>;
4988 + compatible = "gpio-leds";
4989 + pinctrl-0 = <&led_pins>;
4990 + pinctrl-names = "default";
4992 + power_white: power_white {
4993 + label = "r7800:white:power";
4994 + gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
4995 + default-state = "keep";
4998 + power_amber: power_amber {
4999 + label = "r7800:amber:power";
5000 + gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
5004 + label = "r7800:white:wan";
5005 + gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
5009 + label = "r7800:amber:wan";
5010 + gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
5014 + label = "r7800:white:usb1";
5015 + gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
5019 + label = "r7800:white:usb2";
5020 + gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
5024 + label = "r7800:white:esata";
5025 + gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
5029 + label = "r7800:white:wifi";
5030 + gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
5034 + label = "r7800:white:wps";
5035 + gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
5044 +++ b/arch/arm/boot/dts/qcom-ipq8065-v1.0.dtsi
5046 +#include "qcom-ipq8065.dtsi"