1 From 0af44917941cbfecdc86bb9bf05ff01d22a88973 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Sun, 7 Feb 2021 16:52:56 +0100
4 Subject: [PATCH 1/4] ipq806x: gcc: add missing clk flag
6 Some flag are missing from the original code.
7 These clk can't be set using the protected-clock proprities as they
8 cause the malfunction of the serial interface.
9 These clks are needed for the rpm interface to work proprely or the
10 cpu regulators starts to fail as soon as they are disabled by the
13 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
15 drivers/clk/qcom/gcc-ipq806x.c | 19 +++++++++++++------
16 1 file changed, 13 insertions(+), 6 deletions(-)
18 diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
19 index d6b7adb4be38..fbb8644c4a43 100644
20 --- a/drivers/clk/qcom/gcc-ipq806x.c
21 +++ b/drivers/clk/qcom/gcc-ipq806x.c
22 @@ -65,6 +65,7 @@ static struct clk_pll pll3 = {
23 .parent_names = (const char *[]){ "pxo" },
26 + .flags = CLK_IS_CRITICAL,
30 @@ -782,7 +783,7 @@ static struct clk_rcg gsbi4_qup_src = {
31 .parent_names = gcc_pxo_pll8,
34 - .flags = CLK_SET_PARENT_GATE,
35 + .flags = CLK_SET_PARENT_GATE | CLK_IGNORE_UNUSED,
39 @@ -798,7 +799,7 @@ static struct clk_branch gsbi4_qup_clk = {
40 .parent_names = (const char *[]){ "gsbi4_qup_src" },
42 .ops = &clk_branch_ops,
43 - .flags = CLK_SET_RATE_PARENT,
44 + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
48 @@ -880,7 +881,7 @@ static struct clk_rcg gsbi6_qup_src = {
49 .parent_names = gcc_pxo_pll8,
52 - .flags = CLK_SET_PARENT_GATE,
53 + .flags = CLK_SET_PARENT_GATE | CLK_IGNORE_UNUSED,
57 @@ -945,7 +946,7 @@ static struct clk_branch gsbi7_qup_clk = {
58 .parent_names = (const char *[]){ "gsbi7_qup_src" },
60 .ops = &clk_branch_ops,
61 - .flags = CLK_SET_RATE_PARENT,
62 + .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
66 @@ -991,6 +992,7 @@ static struct clk_branch gsbi4_h_clk = {
67 .hw.init = &(struct clk_init_data){
68 .name = "gsbi4_h_clk",
69 .ops = &clk_branch_ops,
70 + .flags = CLK_IGNORE_UNUSED,
74 @@ -1293,6 +1295,7 @@ static struct clk_rcg sdc1_src = {
75 .parent_names = gcc_pxo_pll8,
78 + .flags = CLK_SET_RATE_GATE,
82 @@ -1341,6 +1344,7 @@ static struct clk_rcg sdc3_src = {
83 .parent_names = gcc_pxo_pll8,
86 + .flags = CLK_SET_RATE_GATE,
90 @@ -1424,6 +1428,7 @@ static struct clk_rcg tsif_ref_src = {
91 .parent_names = gcc_pxo_pll8,
94 + .flags = CLK_SET_RATE_GATE,
98 @@ -2694,7 +2699,8 @@ static struct clk_dyn_rcg ubi32_core1_src_clk = {
99 .parent_names = gcc_pxo_pll8_pll14_pll18_pll0,
101 .ops = &clk_dyn_rcg_ops,
102 - .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE,
103 + .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE |
108 @@ -2747,7 +2753,8 @@ static struct clk_dyn_rcg ubi32_core2_src_clk = {
109 .parent_names = gcc_pxo_pll8_pll14_pll18_pll0,
111 .ops = &clk_dyn_rcg_ops,
112 - .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE,
113 + .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE |