ipq806x: introduce nandc boot layout mode
[openwrt/staging/zorun.git] / target / linux / ipq806x / patches-5.10 / 099-1-mtd-nand-raw-qcom_nandc-add-boot_layout_mode-support.patch
1 From 6949d651e3be3ebbfedb6bbd5b541cfda6ee58a9 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Wed, 10 Feb 2021 10:40:17 +0100
4 Subject: [PATCH 1/2] mtd: nand: raw: qcom_nandc: add boot_layout_mode support
5
6 ipq806x nand have a special ecc configuration for the boot pages. The
7 use of the non-boot pages configuration on boot pages cause I/O error
8 and can cause broken data written to the nand. Add support for this
9 special configuration if the page to be read/write is in the size of the
10 boot pages set by the dts.
11
12 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
13 ---
14 drivers/mtd/nand/raw/qcom_nandc.c | 82 +++++++++++++++++++++++++++++--
15 1 file changed, 77 insertions(+), 5 deletions(-)
16
17 diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
18 index 667e4bfe369f..69be86898d7a 100644
19 --- a/drivers/mtd/nand/raw/qcom_nandc.c
20 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
21 @@ -160,6 +160,11 @@
22 /* NAND_CTRL bits */
23 #define BAM_MODE_EN BIT(0)
24
25 +
26 +#define UD_SIZE_BYTES_MASK (0x3ff << UD_SIZE_BYTES)
27 +#define SPARE_SIZE_BYTES_MASK (0xf << SPARE_SIZE_BYTES)
28 +#define ECC_NUM_DATA_BYTES_MASK (0x3ff << ECC_NUM_DATA_BYTES)
29 +
30 /*
31 * the NAND controller performs reads/writes with ECC in 516 byte chunks.
32 * the driver calls the chunks 'step' or 'codeword' interchangeably
33 @@ -431,6 +436,13 @@ struct qcom_nand_controller {
34 * @cfg0, cfg1, cfg0_raw..: NANDc register configurations needed for
35 * ecc/non-ecc mode for the current nand flash
36 * device
37 + *
38 + * @boot_pages_conf: keep track of the current ecc configuration used by
39 + * the driver for read/write operation. (boot pages
40 + * have different configuration than normal page)
41 + * @boot_pages: number of pages starting from 0 used as boot pages
42 + * where the driver will use the boot pages ecc
43 + * configuration for read/write operation
44 */
45 struct qcom_nand_host {
46 struct nand_chip chip;
47 @@ -453,6 +465,9 @@ struct qcom_nand_host {
48 u32 ecc_bch_cfg;
49 u32 clrflashstatus;
50 u32 clrreadstatus;
51 +
52 + bool boot_pages_conf;
53 + u32 boot_pages;
54 };
55
56 /*
57 @@ -462,6 +477,7 @@ struct qcom_nand_host {
58 * @ecc_modes - ecc mode for NAND
59 * @is_bam - whether NAND controller is using BAM
60 * @is_qpic - whether NAND CTRL is part of qpic IP
61 + * @has_boot_pages - whether NAND has different ecc settings for boot pages
62 * @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset
63 */
64 struct qcom_nandc_props {
65 @@ -469,6 +485,7 @@ struct qcom_nandc_props {
66 bool is_bam;
67 bool is_qpic;
68 + bool has_boot_pages;
69 u32 dev_cmd_reg_start;
70 };
71
72 /* Frees the BAM transaction memory */
73 @@ -1622,7 +1639,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
74 data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
75 oob_size1 = host->bbm_size;
76
77 - if (cw == (ecc->steps - 1)) {
78 + if (cw == (ecc->steps - 1) && !host->boot_pages_conf) {
79 data_size2 = ecc->size - data_size1 -
80 ((ecc->steps - 1) * 4);
81 oob_size2 = (ecc->steps * 4) + host->ecc_bytes_hw +
82 @@ -1703,7 +1720,7 @@ check_for_erased_page(struct qcom_nand_host *host, u8 *data_buf,
83 }
84
85 for_each_set_bit(cw, &uncorrectable_cws, ecc->steps) {
86 - if (cw == (ecc->steps - 1)) {
87 + if (cw == (ecc->steps - 1) && !host->boot_pages_conf) {
88 data_size = ecc->size - ((ecc->steps - 1) * 4);
89 oob_size = (ecc->steps * 4) + host->ecc_bytes_hw;
90 } else {
91 @@ -1862,7 +1879,7 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
92 for (i = 0; i < ecc->steps; i++) {
93 int data_size, oob_size;
94
95 - if (i == (ecc->steps - 1)) {
96 + if (i == (ecc->steps - 1) && !host->boot_pages_conf) {
97 data_size = ecc->size - ((ecc->steps - 1) << 2);
98 oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
99 host->spare_bytes;
100 @@ -1959,6 +1976,30 @@ static int copy_last_cw(struct qcom_nand_host *host, int page)
101 return ret;
102 }
103
104 +static void
105 +check_boot_pages_conf(struct qcom_nand_host *host, int page)
106 +{
107 + bool boot_pages_conf = page < host->boot_pages;
108 +
109 + /* Skip conf write if we are already in the correct mode */
110 + if (boot_pages_conf != host->boot_pages_conf) {
111 + host->boot_pages_conf = boot_pages_conf;
112 +
113 + host->cw_data = boot_pages_conf ? 512 : 516;
114 + host->spare_bytes = host->cw_size - host->ecc_bytes_hw -
115 + host->bbm_size - host->cw_data;
116 +
117 + host->cfg0 &= ~(SPARE_SIZE_BYTES_MASK | UD_SIZE_BYTES_MASK);
118 + host->cfg0 |= host->spare_bytes << SPARE_SIZE_BYTES |
119 + host->cw_data << UD_SIZE_BYTES;
120 +
121 + host->ecc_bch_cfg &= ~ECC_NUM_DATA_BYTES_MASK;
122 + host->ecc_bch_cfg |= host->cw_data << ECC_NUM_DATA_BYTES;
123 + host->ecc_buf_cfg = (boot_pages_conf ? 0x1ff : 0x203) <<
124 + NUM_STEPS;
125 + }
126 +}
127 +
128 /* implements ecc->read_page() */
129 static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
130 int oob_required, int page)
131 @@ -1967,6 +2008,9 @@ static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
132 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
133 u8 *data_buf, *oob_buf = NULL;
134
135 + if (host->boot_pages)
136 + check_boot_pages_conf(host, page);
137 +
138 nand_read_page_op(chip, page, 0, NULL, 0);
139 data_buf = buf;
140 oob_buf = oob_required ? chip->oob_poi : NULL;
141 @@ -1986,6 +2030,9 @@ static int qcom_nandc_read_page_raw(struct nand_chip *chip, uint8_t *buf,
142 int cw, ret;
143 u8 *data_buf = buf, *oob_buf = chip->oob_poi;
144
145 + if (host->boot_pages)
146 + check_boot_pages_conf(host, page);
147 +
148 for (cw = 0; cw < ecc->steps; cw++) {
149 ret = qcom_nandc_read_cw_raw(mtd, chip, data_buf, oob_buf,
150 page, cw);
151 @@ -2006,6 +2053,9 @@ static int qcom_nandc_read_oob(struct nand_chip *chip, int page)
152 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
153 struct nand_ecc_ctrl *ecc = &chip->ecc;
154
155 + if (host->boot_pages)
156 + check_boot_pages_conf(host, page);
157 +
158 clear_read_regs(nandc);
159 clear_bam_transaction(nandc);
160
161 @@ -2026,6 +2076,9 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const uint8_t *buf,
162 u8 *data_buf, *oob_buf;
163 int i, ret;
164
165 + if (host->boot_pages)
166 + check_boot_pages_conf(host, page);
167 +
168 nand_prog_page_begin_op(chip, page, 0, NULL, 0);
169
170 clear_read_regs(nandc);
171 @@ -2041,7 +2094,7 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const uint8_t *buf,
172 for (i = 0; i < ecc->steps; i++) {
173 int data_size, oob_size;
174
175 - if (i == (ecc->steps - 1)) {
176 + if (i == (ecc->steps - 1) && !host->boot_pages_conf) {
177 data_size = ecc->size - ((ecc->steps - 1) << 2);
178 oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
179 host->spare_bytes;
180 @@ -2098,6 +2151,9 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip,
181 u8 *data_buf, *oob_buf;
182 int i, ret;
183
184 + if (host->boot_pages)
185 + check_boot_pages_conf(host, page);
186 +
187 nand_prog_page_begin_op(chip, page, 0, NULL, 0);
188 clear_read_regs(nandc);
189 clear_bam_transaction(nandc);
190 @@ -2116,7 +2172,7 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip,
191 data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
192 oob_size1 = host->bbm_size;
193
194 - if (i == (ecc->steps - 1)) {
195 + if (i == (ecc->steps - 1) && !host->boot_pages_conf) {
196 data_size2 = ecc->size - data_size1 -
197 ((ecc->steps - 1) << 2);
198 oob_size2 = (ecc->steps << 2) + host->ecc_bytes_hw +
199 @@ -2176,6 +2232,9 @@ static int qcom_nandc_write_oob(struct nand_chip *chip, int page)
200 int data_size, oob_size;
201 int ret;
202
203 + if (host->boot_pages)
204 + check_boot_pages_conf(host, page);
205 +
206 host->use_ecc = true;
207 clear_bam_transaction(nandc);
208
209 @@ -2828,6 +2887,7 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
210 struct nand_chip *chip = &host->chip;
211 struct mtd_info *mtd = nand_to_mtd(chip);
212 struct device *dev = nandc->dev;
213 + u32 boot_pages_size;
214 int ret;
215
216 ret = of_property_read_u32(dn, "reg", &host->cs);
217 @@ -2888,6 +2948,17 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
218 if (ret)
219 nand_cleanup(chip);
220
221 + if (nandc->props->has_boot_pages &&
222 + of_property_read_bool(dn, "nand-is-boot-medium")) {
223 + ret = of_property_read_u32(dn, "qcom,boot_pages_size",
224 + &boot_pages_size);
225 + if (ret)
226 + dev_warn(dev, "can't get boot pages size");
227 + else
228 + /* Convert size to nand pages */
229 + host->boot_pages = boot_pages_size / mtd->writesize;
230 + }
231 +
232 return ret;
233 }
234
235 @@ -3057,6 +3128,7 @@ static int qcom_nandc_remove(struct platform_device *pdev)
236 static const struct qcom_nandc_props ipq806x_nandc_props = {
237 .ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT),
238 .is_bam = false,
239 + .has_boot_pages = true,
240 .dev_cmd_reg_start = 0x0,
241 };
242
243 --
244 2.29.2
245