target/linux/ipq806x/patches-5.4/0073-pinctrl-qom-use-scm_call-to-route-GPIO-irq-to-Apps.patch

   1 From 2034addc7e193dc81d7ca60d8884832751b76758 Mon Sep 17 00:00:00 2001
   2 From: Ajay Kishore <akisho@codeaurora.org>
   3 Date: Tue, 24 Jan 2017 14:14:16 +0530
   4 Subject: pinctrl: qcom: use scm_call to route GPIO irq to Apps
   5
   6 For IPQ806x targets, TZ protects the registers that are used to
   7 configure the routing of interrupts to a target processor.
   8 To resolve this, this patch uses scm call to route GPIO interrupts
   9 to application processor. Also the scm call interface is changed.
  10
  11 Change-Id: Ib6c06829d04bc8c20483c36e63da92e26cdef9ce
  12 Signed-off-by: Ajay Kishore <akisho@codeaurora.org>
  13 ---
  14
  15 --- a/drivers/pinctrl/qcom/pinctrl-msm.c
  16 +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
  17 @@ -22,7 +22,8 @@
  18  #include <linux/reboot.h>
  19  #include <linux/pm.h>
  20  #include <linux/log2.h>
  21 -
  22 +#include <linux/qcom_scm.h>
  23 +#include <linux/io.h>
  24  #include "../core.h"
  25  #include "../pinconf.h"
  26  #include "pinctrl-msm.h"
  27 @@ -706,6 +707,9 @@ static void msm_gpio_irq_mask(struct irq
  28         const struct msm_pingroup *g;
  29         unsigned long flags;
  30         u32 val;
  31 +       u32 addr;
  32 +       int ret;
  33 +       const __be32 *reg;
  34
  35         g = &pctrl->soc->groups[d->hwirq];
  36
  37 @@ -819,6 +823,7 @@ static int msm_gpio_irq_set_type(struct
  38         const struct msm_pingroup *g;
  39         unsigned long flags;
  40         u32 val;
  41 +       int ret;
  42
  43         g = &pctrl->soc->groups[d->hwirq];
  44
  45 @@ -832,11 +837,30 @@ static int msm_gpio_irq_set_type(struct
  46         else
  47                 clear_bit(d->hwirq, pctrl->dual_edge_irqs);
  48
  49 +       ret = of_device_is_compatible(pctrl->dev->of_node,
  50 +                                       "qcom,ipq8064-pinctrl");
  51         /* Route interrupts to application cpu */
  52 -       val = msm_readl_intr_target(pctrl, g);
  53 -       val &= ~(7 << g->intr_target_bit);
  54 -       val |= g->intr_target_kpss_val << g->intr_target_bit;
  55 -       msm_writel_intr_target(val, pctrl, g);
  56 +       if (!ret) {
  57 +               val = msm_readl_intr_target(pctrl, g);
  58 +               val &= ~(7 << g->intr_target_bit);
  59 +               val |= g->intr_target_kpss_val << g->intr_target_bit;
  60 +               msm_writel_intr_target(val, pctrl, g);
  61 +       } else {
  62 +               const __be32 *reg = of_get_property(pctrl->dev->of_node, "reg", NULL);
  63 +               if (reg) {
  64 +                       u32 addr = be32_to_cpup(reg) + g->intr_target_reg;
  65 +                       qcom_scm_io_readl(addr, &val);
  66 +                       __iormb();
  67 +
  68 +                       val &= ~(7 << g->intr_target_bit);
  69 +                       val |= g->intr_target_kpss_val << g->intr_target_bit;
  70 +
  71 +                       __iowmb();
  72 +                       ret = qcom_scm_io_writel(addr, val);
  73 +                       if (ret)
  74 +                               pr_err("\n Routing interrupts to Apps proc failed");
  75 +               }
  76 +       }
  77
  78         /* Update configuration for gpio.
  79          * RAW_STATUS_EN is left on for all gpio irqs. Due to the