1 From 504188183408fac0f61b59f5ed8ea1773fe43669 Mon Sep 17 00:00:00 2001
2 From: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
3 Date: Wed, 15 Jun 2022 16:59:30 +0200
4 Subject: [PATCH 2/2] ARM: dts: qcom: add MDIO dedicated controller node for
7 Add MDIO dedicated controller attached to gmac0 and fix rb3011 dts to
8 correctly use the new tag.
10 Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
12 arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 134 +++++++++++-----------
13 arch/arm/boot/dts/qcom-ipq8064.dtsi | 14 +++
14 2 files changed, 81 insertions(+), 67 deletions(-)
16 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
17 +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
19 device_type = "memory";
24 - compatible = "virtual,mdio-gpio";
25 - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
26 - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
27 - #address-cells = <1>;
30 - pinctrl-0 = <&mdio0_pins>;
31 - pinctrl-names = "default";
33 - switch0: switch@10 {
34 - compatible = "qca,qca8337";
35 - #address-cells = <1>;
40 - pinctrl-0 = <&sw0_reset_pin>;
41 - pinctrl-names = "default";
43 - reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
47 - #address-cells = <1>;
50 - switch0cpu: port@0 {
53 - ethernet = <&gmac0>;
54 - phy-mode = "rgmii-id";
91 compatible = "virtual,mdio-gpio";
98 + compatible = "virtual,mdio-gpio";
99 + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
100 + <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
101 + #address-cells = <1>;
104 + pinctrl-0 = <&mdio0_pins>;
105 + pinctrl-names = "default";
107 + switch0: switch@10 {
108 + compatible = "qca,qca8337";
109 + #address-cells = <1>;
112 + dsa,member = <0 0>;
114 + pinctrl-0 = <&sw0_reset_pin>;
115 + pinctrl-names = "default";
117 + reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
121 + #address-cells = <1>;
124 + switch0cpu: port@0 {
127 + ethernet = <&gmac0>;
128 + phy-mode = "rgmii-id";
166 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
167 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
169 snps,blen = <16 0 0 0 0 0 0>;
172 + mdio0: mdio@37000000 {
173 + #address-cells = <1>;
176 + compatible = "qcom,ipq8064-mdio", "syscon";
177 + reg = <0x37000000 0x200000>;
178 + resets = <&gcc GMAC_CORE1_RESET>;
179 + reset-names = "stmmaceth";
180 + clocks = <&gcc GMAC_CORE1_CLK>;
181 + clock-names = "stmmaceth";
183 + status = "disabled";
186 vsdcc_fixed: vsdcc-regulator {
187 compatible = "regulator-fixed";
188 regulator-name = "SDCC Power";