1 From 3d8c0e94a792ae62fa0495ac940c9850a059afc2 Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Tue, 5 Jul 2022 21:39:18 +0200
4 Subject: [PATCH v2 3/4] clk: qcom: clk-rpm: convert to parent_data API
6 Convert clk-rpm driver to parent_data API.
7 We keep the old pxo/cxo_board parent naming to keep compatibility with
8 old DT and we use the new pxo/cxo for new implementation where these
9 clock are defined in DTS.
11 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
13 drivers/clk/qcom/clk-rpm.c | 24 ++++++++++++++++--------
14 1 file changed, 16 insertions(+), 8 deletions(-)
16 --- a/drivers/clk/qcom/clk-rpm.c
17 +++ b/drivers/clk/qcom/clk-rpm.c
19 #define QCOM_RPM_SCALING_ENABLE_ID 0x2
20 #define QCOM_RPM_XO_MODE_ON 0x2
22 +static const struct clk_parent_data gcc_pxo[] = {
23 + { .fw_name = "pxo", .name = "pxo_board" },
26 +static const struct clk_parent_data gcc_cxo[] = {
27 + { .fw_name = "cxo", .name = "cxo_board" },
30 #define DEFINE_CLK_RPM(_platform, _name, _active, r_id) \
31 static struct clk_rpm _platform##_##_active; \
32 static struct clk_rpm _platform##_##_name = { \
34 .hw.init = &(struct clk_init_data){ \
35 .ops = &clk_rpm_ops, \
37 - .parent_names = (const char *[]){ "pxo_board" }, \
39 + .parent_data = gcc_pxo, \
40 + .num_parents = ARRAY_SIZE(gcc_pxo), \
43 static struct clk_rpm _platform##_##_active = { \
45 .hw.init = &(struct clk_init_data){ \
46 .ops = &clk_rpm_ops, \
48 - .parent_names = (const char *[]){ "pxo_board" }, \
50 + .parent_data = gcc_pxo, \
51 + .num_parents = ARRAY_SIZE(gcc_pxo), \
56 .hw.init = &(struct clk_init_data){ \
57 .ops = &clk_rpm_xo_ops, \
59 - .parent_names = (const char *[]){ "cxo_board" }, \
61 + .parent_data = gcc_cxo, \
62 + .num_parents = ARRAY_SIZE(gcc_cxo), \
67 .hw.init = &(struct clk_init_data){ \
68 .ops = &clk_rpm_fixed_ops, \
70 - .parent_names = (const char *[]){ "pxo" }, \
72 + .parent_data = gcc_pxo, \
73 + .num_parents = ARRAY_SIZE(gcc_pxo), \