1 From 9732c4f2d93a4a39ffc903c88ab7d531a8bb2e74 Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Wed, 20 Mar 2024 00:47:58 +0100
4 Subject: [PATCH] mtd: rawnand: qcom: Fix broken misc_cmd_type in exec_op
6 misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409
7 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was
8 reworked and generalized but actually dropped the handling of the
11 Also additional logic was added without clear explaination causing the
12 erase command to be broken on testing it on a ipq806x nandc.
14 Add some additional logic to restore RESET_DEVICE command handling and
17 Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path")
18 Cc: stable@vger.kernel.org
19 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
21 drivers/mtd/nand/raw/qcom_nandc.c | 7 +++----
22 1 file changed, 3 insertions(+), 4 deletions(-)
24 --- a/drivers/mtd/nand/raw/qcom_nandc.c
25 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
26 @@ -2815,7 +2815,7 @@ static int qcom_misc_cmd_type_exec(struc
27 host->cfg0_raw & ~(7 << CW_PER_PAGE));
28 nandc_set_reg(chip, NAND_DEV0_CFG1, host->cfg1_raw);
31 + } else if (q_op.cmd_reg != OP_RESET_DEVICE) {
35 @@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struc
36 nandc_set_reg(chip, NAND_EXEC_CMD, 1);
38 write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL);
39 - (q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0,
40 - 2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc,
41 - NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
42 + if (q_op.cmd_reg == OP_BLOCK_ERASE)
43 + write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL);
45 write_reg_dma(nandc, NAND_EXEC_CMD, 1, NAND_BAM_NEXT_SGL);
46 read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);