1 From a505f23abf0c31f40a2c3070d82e961b7c045664 Mon Sep 17 00:00:00 2001
2 From: Kathiravan T <quic_kathirav@quicinc.com>
3 Date: Tue, 8 Feb 2022 21:05:24 +0530
4 Subject: [PATCH] arm64: dts: qcom: ipq8074: enable the GICv2m support
6 GIC used in the IPQ8074 SoCs has one instance of the GICv2m extension,
7 which supports upto 32 MSI interrupts. Lets add support for the same.
9 Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
10 Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
11 Link: https://lore.kernel.org/r/1644334525-11577-2-git-send-email-quic_kathirav@quicinc.com
13 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 9 +++++++++
14 1 file changed, 9 insertions(+)
16 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
17 +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
20 intc: interrupt-controller@b000000 {
21 compatible = "qcom,msm-qgic2";
22 + #address-cells = <1>;
25 #interrupt-cells = <0x3>;
26 reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
27 + ranges = <0 0xb00a000 0xffd>;
30 + compatible = "arm,gic-v2m-frame";