ipq807x: add Qualcomm Atheros IPQ807x target
[openwrt/staging/jow.git] / target / linux / ipq807x / patches-5.15 / 0037-v6.1-clk-qcom-apss-ipq-pll-add-support-for-IPQ8074.patch
1 From e0a711bd88ba98f6ab5118d248ec84fcf495d313 Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robimarko@gmail.com>
3 Date: Fri, 19 Aug 2022 00:06:26 +0200
4 Subject: [PATCH] clk: qcom: apss-ipq-pll: add support for IPQ8074
5
6 Add support for IPQ8074 since it uses the same PLL setup, however it uses
7 slightly different Alpha PLL config.
8
9 Alpha PLL config was obtained by dumping PLL registers from a running
10 device.
11
12 Signed-off-by: Robert Marko <robimarko@gmail.com>
13 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
14 Link: https://lore.kernel.org/r/20220818220628.339366-7-robimarko@gmail.com
15 ---
16 drivers/clk/qcom/apss-ipq-pll.c | 13 +++++++++++++
17 1 file changed, 13 insertions(+)
18
19 --- a/drivers/clk/qcom/apss-ipq-pll.c
20 +++ b/drivers/clk/qcom/apss-ipq-pll.c
21 @@ -49,6 +49,18 @@ static const struct alpha_pll_config ipq
22 .test_ctl_hi_val = 0x4000,
23 };
24
25 +static const struct alpha_pll_config ipq8074_pll_config = {
26 + .l = 0x48,
27 + .config_ctl_val = 0x200d4828,
28 + .config_ctl_hi_val = 0x6,
29 + .early_output_mask = BIT(3),
30 + .aux2_output_mask = BIT(2),
31 + .aux_output_mask = BIT(1),
32 + .main_output_mask = BIT(0),
33 + .test_ctl_val = 0x1c000000,
34 + .test_ctl_hi_val = 0x4000,
35 +};
36 +
37 static const struct regmap_config ipq_pll_regmap_config = {
38 .reg_bits = 32,
39 .reg_stride = 4,
40 @@ -89,6 +101,7 @@ static int apss_ipq_pll_probe(struct pla
41
42 static const struct of_device_id apss_ipq_pll_match_table[] = {
43 { .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_config },
44 + { .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_config },
45 { }
46 };
47 MODULE_DEVICE_TABLE(of, apss_ipq_pll_match_table);