target/linux/ipq807x/patches-5.15/0072-v6.0-phy-qcom-qmp-pcie-make-pipe-clock-rate-configurable.patch

   1 From 2b0fe9137aa32d7fc367bf3a1cef4fa97ece6d58 Mon Sep 17 00:00:00 2001
   2 From: Robert Marko <robimarko@gmail.com>
   3 Date: Tue, 23 Aug 2022 22:43:51 +0200
   4 Subject: [PATCH] phy: qcom-qmp-pcie: make pipe clock rate configurable
   5
   6 IPQ8074 Gen3 PCIe PHY uses 250MHz as the pipe clock rate instead of 125MHz
   7 like every other PCIe QMP PHY does, so make it configurable as part of the
   8 qmp_phy_cfg.
   9
  10 Signed-off-by: Robert Marko <robimarko@gmail.com>
  11 Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
  12 Link: https://lore.kernel.org/r/20220621195512.1760362-1-robimarko@gmail.com
  13 Signed-off-by: Vinod Koul <vkoul@kernel.org>
  14 ---
  15  drivers/phy/qualcomm/phy-qcom-qmp.c | 14 ++++++++++++--
  16  1 file changed, 12 insertions(+), 2 deletions(-)
  17
  18 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c
  19 +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
  20 @@ -2842,6 +2842,9 @@ struct qmp_phy_cfg {
  21         /* true, if PHY has secondary tx/rx lanes to be configured */
  22         bool is_dual_lane_phy;
  23
  24 +       /* QMP PHY pipe clock interface rate */
  25 +       unsigned long pipe_clock_rate;
  26 +
  27         /* true, if PCS block has no separate SW_RESET register */
  28         bool no_pcs_sw_reset;
  29  };
  30 @@ -5138,8 +5141,15 @@ static int phy_pipe_clk_register(struct
  31
  32         init.ops = &clk_fixed_rate_ops;
  33
  34 -       /* controllers using QMP phys use 125MHz pipe clock interface */
  35 -       fixed->fixed_rate = 125000000;
  36 +       /*
  37 +        * Controllers using QMP PHY-s use 125MHz pipe clock interface
  38 +        * unless other frequency is specified in the PHY config.
  39 +        */
  40 +       if (qmp->phys[0]->cfg->pipe_clock_rate)
  41 +               fixed->fixed_rate = qmp->phys[0]->cfg->pipe_clock_rate;
  42 +       else
  43 +               fixed->fixed_rate = 125000000;
  44 +
  45         fixed->hw.init = &init;
  46
  47         ret = devm_clk_hw_register(qmp->dev, &fixed->hw);