1 --- a/arch/arm/mach-ixp4xx/cambria-setup.c
2 +++ b/arch/arm/mach-ixp4xx/cambria-setup.c
4 #include <asm/mach/arch.h>
5 #include <asm/mach/flash.h>
7 +#include <linux/irq.h>
9 struct cambria_board_info {
11 @@ -127,6 +128,45 @@ static struct platform_device cambria_ua
12 .resource = &cambria_uart_resource,
15 +static struct resource cambria_optional_uart_resources[] = {
17 + .start = 0x52000000,
19 + .flags = IORESOURCE_MEM
22 + .start = 0x53000000,
24 + .flags = IORESOURCE_MEM
28 +static struct plat_serial8250_port cambria_optional_uart_data[] = {
30 + .flags = UPF_BOOT_AUTOCONF,
31 + .iotype = UPIO_MEM_DELAY,
37 + .flags = UPF_BOOT_AUTOCONF,
38 + .iotype = UPIO_MEM_DELAY,
46 +static struct platform_device cambria_optional_uart = {
47 + .name = "serial8250",
48 + .id = PLAT8250_DEV_PLATFORM1,
49 + .dev.platform_data = cambria_optional_uart_data,
51 + .resource = cambria_optional_uart_resources,
54 static struct resource cambria_pata_resources[] = {
56 .flags = IORESOURCE_MEM
57 @@ -283,6 +323,19 @@ static void __init cambria_gw23xx_setup(
59 static void __init cambria_gw2350_setup(void)
61 + *IXP4XX_EXP_CS2 = 0xBFFF3C43;
62 + irq_set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING);
63 + cambria_optional_uart_data[0].mapbase = 0x52FF0000;
64 + cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x52FF0000, 0x0fff);
65 + cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
67 + *IXP4XX_EXP_CS3 = 0xBFFF3C43;
68 + irq_set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING);
69 + cambria_optional_uart_data[1].mapbase = 0x53FF0000;
70 + cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53FF0000, 0x0fff);
71 + cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
73 + platform_device_register(&cambria_optional_uart);
74 platform_device_register(&cambria_npec_device);
75 platform_device_register(&cambria_npea_device);
77 @@ -294,6 +347,19 @@ static void __init cambria_gw2350_setup(
79 static void __init cambria_gw2358_setup(void)
81 + *IXP4XX_EXP_CS3 = 0xBFFF3C43;
82 + irq_set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING);
83 + cambria_optional_uart_data[0].mapbase = 0x53FC0000;
84 + cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x53FC0000, 0x0fff);
85 + cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
87 + irq_set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING);
88 + cambria_optional_uart_data[1].mapbase = 0x53F80000;
89 + cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff);
90 + cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
92 + platform_device_register(&cambria_optional_uart);
94 platform_device_register(&cambria_npec_device);
95 platform_device_register(&cambria_npea_device);