1 From efa968c18abab78c5e0c40a853caf286c3629a59 Mon Sep 17 00:00:00 2001
2 From: Pawel Dembicki <paweldembicki@gmail.com>
3 Date: Tue, 17 Mar 2020 21:28:01 +0100
4 Subject: [PATCH v3] ARM: dts: kirkwood: Add Check Point L-50 board
6 This patch adds dts for the Check Point L-50 from 600/1100 series
10 -CPU: Marvell Kirkwood 88F6821 1200MHz
13 -WiFi: mPCIe card based on Atheros AR9287 b/g/n
14 -WAN: 1 Gigabit Port (Marvell 88E1116R PHY)
15 -LAN: 9 Gigabit Ports (2x Marvell 88E6171(5+3))
19 -Serial console: RJ-45 115200 8n1
22 Reviewed-by: Andrew Lunn <andrew@lunn.ch>
23 Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
26 - fix typo and code style issues pointed by OpenWrt guys
30 arch/arm/boot/dts/Makefile | 1 +
31 arch/arm/boot/dts/kirkwood-l-50.dts | 438 ++++++++++++++++++++++++++++
32 2 files changed, 439 insertions(+)
33 create mode 100644 arch/arm/boot/dts/kirkwood-l-50.dts
35 --- a/arch/arm/boot/dts/Makefile
36 +++ b/arch/arm/boot/dts/Makefile
37 @@ -270,6 +270,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
38 kirkwood-iomega_ix2_200.dtb \
40 kirkwood-km_kirkwood.dtb \
43 kirkwood-linkstation-lsqvl.dtb \
44 kirkwood-linkstation-lsvl.dtb \
46 +++ b/arch/arm/boot/dts/kirkwood-l-50.dts
48 +// SPDX-License-Identifier: GPL-2.0
50 + * Check Point L-50 Board Description
51 + * Copyright 2020 Pawel Dembicki <paweldembicki@gmail.com>
56 +#include "kirkwood.dtsi"
57 +#include "kirkwood-6281.dtsi"
60 + model = "Check Point L-50";
61 + compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
64 + device_type = "memory";
65 + reg = <0x00000000 0x20000000>;
69 + bootargs = "console=ttyS0,115200n8";
70 + stdout-path = &uart0;
74 + pinctrl: pin-controller@10000 {
75 + pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
76 + pinctrl-names = "default";
78 + pmx_sysrst: pmx-sysrst {
79 + marvell,pins = "mpp6";
80 + marvell,function = "sysrst";
83 + pmx_button29: pmx_button29 {
84 + marvell,pins = "mpp29";
85 + marvell,function = "gpio";
88 + pmx_led38: pmx_led38 {
89 + marvell,pins = "mpp38";
90 + marvell,function = "gpio";
93 + pmx_sdio_cd: pmx-sdio-cd {
94 + marvell,pins = "mpp46";
95 + marvell,function = "gpio";
105 + cd-gpios = <&gpio1 14 9>;
110 + clock-frequency = <400000>;
112 + gpio2: gpio-expander@20{
114 + #interrupt-cells = <2>;
115 + compatible = "semtech,sx1505q";
121 + /* Three GPIOs from 0x21 exp. are undescribed in dts:
122 + * 1: DSL module reset (active low)
123 + * 5: mPCIE reset (active low)
124 + * 6: Express card reset (active low)
126 + gpio3: gpio-expander@21{
128 + #interrupt-cells = <2>;
129 + compatible = "semtech,sx1505q";
136 + compatible = "s35390a";
143 + compatible = "gpio-leds";
146 + label = "l-50:green:status";
147 + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
151 + label = "l-50:red:status";
152 + gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
156 + label = "l-50:green:wifi";
157 + gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
158 + linux,default-trigger = "phy0tpt";
162 + label = "l-50:green:internet";
163 + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
167 + label = "l-50:red:internet";
168 + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
172 + label = "l-50:green:usb1";
173 + gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
174 + linux,default-trigger = "usbport";
175 + trigger-sources = <&hub_port3>;
179 + label = "l-50:red:usb1";
180 + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
184 + label = "l-50:green:usb2";
185 + gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
186 + linux,default-trigger = "usbport";
187 + trigger-sources = <&hub_port1>;
191 + label = "l-50:red:usb2";
192 + gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
197 + compatible = "regulator-fixed";
198 + regulator-name = "usb2_pwr";
200 + regulator-min-microvolt = <5000000>;
201 + regulator-max-microvolt = <5000000>;
202 + gpio = <&gpio3 3 GPIO_ACTIVE_LOW>;
203 + regulator-always-on;
207 + compatible = "regulator-fixed";
208 + regulator-name = "usb1_pwr";
210 + regulator-min-microvolt = <5000000>;
211 + regulator-max-microvolt = <5000000>;
212 + gpio = <&gpio3 4 GPIO_ACTIVE_LOW>;
213 + regulator-always-on;
217 + compatible = "regulator-fixed";
218 + regulator-name = "mpcie_pwr";
220 + regulator-min-microvolt = <3300000>;
221 + regulator-max-microvolt = <3300000>;
222 + gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
223 + enable-active-high;
224 + regulator-always-on;
228 + compatible = "regulator-fixed";
229 + regulator-name = "express_card_pwr";
231 + regulator-min-microvolt = <3300000>;
232 + regulator-max-microvolt = <3300000>;
233 + gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
234 + enable-active-high;
235 + regulator-always-on;
239 + compatible = "gpio-keys";
242 + label = "factory_defaults";
243 + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
244 + linux,code = <KEY_RESTART>;
252 + ethphy8: ethernet-phy@8 {
256 + switch0: switch@10 {
257 + compatible = "marvell,mv88e6085";
258 + #address-cells = <1>;
261 + dsa,member = <0 0>;
264 + #address-cells = <1>;
292 + switch0port5: port@5 {
294 + phy-mode = "rgmii-txid";
295 + link = <&switch1port5>;
305 + phy-mode = "rgmii-id";
306 + ethernet = <ð1port>;
316 + compatible = "marvell,mv88e6085";
317 + #address-cells = <1>;
320 + dsa,member = <0 1>;
323 + #address-cells = <1>;
346 + switch1port5: port@5 {
348 + phy-mode = "rgmii-txid";
349 + link = <&switch0port5>;
371 + phy-handle = <ðphy8>;
385 + pinctrl-0 = <&pmx_nand>;
386 + pinctrl-names = "default";
390 + reg = <0x00000000 0x000c0000>;
394 + label = "bootldr-env";
395 + reg = <0x000c0000 0x00040000>;
399 + label = "kernel-1";
400 + reg = <0x00100000 0x00800000>;
404 + label = "rootfs-1";
405 + reg = <0x00900000 0x07100000>;
408 + partition@7a00000 {
409 + label = "kernel-2";
410 + reg = <0x07a00000 0x00800000>;
413 + partition@8200000 {
414 + label = "rootfs-2";
415 + reg = <0x08200000 0x07100000>;
418 + partition@f300000 {
419 + label = "default_sw";
420 + reg = <0x0f300000 0x07900000>;
423 + partition@16c00000 {
425 + reg = <0x16c00000 0x01800000>;
428 + partition@18400000 {
429 + label = "preset_cfg";
430 + reg = <0x18400000 0x00100000>;
433 + partition@18500000 {
435 + reg = <0x18500000 0x00100000>;
438 + partition@18600000 {
440 + reg = <0x18600000 0x07a00000>;
445 + status = "disabled";
457 + status = "disabled";
461 + status = "disabled";
465 + #address-cells = <1>;
470 + #address-cells = <1>;
473 + #trigger-source-cells = <0>;
475 + hub_port1: port@1 {
477 + #trigger-source-cells = <0>;
480 + hub_port3: port@3 {
482 + #trigger-source-cells = <0>;