5 bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
18 reg = <0x0 0x4000000>;
24 compatible = "lantiq,fpi", "simple-bus";
25 ranges = <0x0 0x10000000 0xEEFFFFF>;
26 reg = <0x10000000 0xEF00000>;
31 compatible = "lantiq,localbus", "simple-bus";
35 gpio: pinmux@E100B10 {
36 compatible = "lantiq,pinctrl-xr9";
37 pinctrl-names = "default";
38 pinctrl-0 = <&state_default>;
40 interrupt-parent = <&icu0>;
41 interrupts = <166 135 66 40 41 42 38>;
45 reg = <0xE100B10 0xA0>;
47 state_default: pinmux {
49 lantiq,groups = "exin3";
50 lantiq,function = "exin";
53 lantiq,groups = "stp";
54 lantiq,function = "stp";
57 lantiq,groups = "nand cle", "nand ale",
58 "nand rd", "nand rdy";
59 lantiq,function = "ebu";
62 lantiq,groups = "mdio";
63 lantiq,function = "mdio";
66 lantiq,groups = "gnt1", "req1";
67 lantiq,function = "pci";
70 lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
71 "io4", "io5", "io6", /* stp */
84 lantiq,pins = "io39", /* exin3 */
85 "io48"; /* nand rdy */
89 pins_spi_default: pins_spi_default {
91 lantiq,groups = "spi_di";
92 lantiq,function = "spi";
95 lantiq,groups = "spi_do", "spi_clk",
97 lantiq,function = "spi";
104 #address-cells = <1>;
106 compatible = "lantiq,xrx200-net";
107 reg = < 0xE108000 0x3000 /* switch */
108 0xE10B100 0x70 /* mdio */
109 0xE10B1D8 0x30 /* mii */
110 0xE10B308 0x30 /* pmac */
112 interrupt-parent = <&icu0>;
113 interrupts = <73 72>;
116 compatible = "lantiq,xrx200-pdi";
117 #address-cells = <1>;
120 mac-address = [ 00 11 22 33 44 55 ];
123 compatible = "lantiq,xrx200-pdi-port";
126 phy-handle = <&phy0>;
129 compatible = "lantiq,xrx200-pdi-port";
132 phy-handle = <&phy1>;
135 compatible = "lantiq,xrx200-pdi-port";
138 phy-handle = <&phy11>;
143 compatible = "lantiq,xrx200-pdi";
144 #address-cells = <1>;
147 mac-address = [ 00 11 22 33 44 56 ];
150 compatible = "lantiq,xrx200-pdi-port";
153 phy-handle = <&phy5>;
158 compatible = "lantiq,xrx200-pdi";
159 #address-cells = <1>;
162 mac-address = [ 00 11 22 33 44 57 ];
164 compatible = "lantiq,xrx200-pdi-port";
167 phy-handle = <&phy13>;
172 #address-cells = <1>;
174 compatible = "lantiq,xrx200-mdio";
175 phy0: ethernet-phy@0 {
177 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
179 phy1: ethernet-phy@1 {
181 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
183 phy5: ethernet-phy@5 {
185 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
187 phy11: ethernet-phy@11 {
189 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
191 phy13: ethernet-phy@13 {
193 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
199 compatible = "lantiq,gpio-stp-xway";
200 reg = <0xE100BB0 0x40>;
204 lantiq,shadow = <0xffff>;
205 lantiq,groups = <0x7>;
214 gpios = <&gpio 33 0>;
215 lantiq,portmask = <0x3>;
219 #address-cells = <3>;
221 #interrupt-cells = <1>;
222 compatible = "lantiq,pci-xway1";
223 bus-range = <0x0 0x0>;
224 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
225 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
226 reg = <0x7000000 0x8000 /* config space */
227 0xE105400 0x400>; /* pci bridge */
228 lantiq,bus-clock = <33333333>;
229 /*lantiq,external-clock;*/
230 lantiq,delay-hi = <0>; /* 0ns delay */
231 lantiq,delay-lo = <0>; /* 0.0ns delay */
232 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
234 0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
236 gpios-reset = <&gpio 21 0>;
237 req-mask = <0x1>; /* GNT1 */
242 compatible = "lantiq,phy-xrx200";
243 firmware = "lantiq/vr9_phy11g_a2x.bin";
248 compatible = "gpio-keys-polled";
249 #address-cells = <1>;
251 poll-interval = <100>;
255 linux,code = <0x198>;
259 gpios = <&gpio 11 1>;
260 linux,code = <0x100>;
265 compatible = "gpio-leds";
268 label = "easy80920:green:power";
270 default-state = "keep";
273 label = "easy80920:green:warning";
277 label = "easy80920:green:fxs1";
281 label = "easy80920:green:fxs2";
285 label = "easy80920:green:fxo";
289 label = "easy80920:green:usb1";
293 label = "easy80920:green:usb2";
297 label = "easy80920:green:sd";
301 label = "easy80920:green:wps";
308 pinctrl-names = "default";
309 pinctrl-0 = <&pins_spi_default>;
314 #address-cells = <1>;
316 compatible = "jedec,spi-nor";
318 spi-max-frequency = <1000000>;
322 label = "SPI (RO) U-Boot Image";
327 reg = <0x20000 0x10000>;
333 reg = <0x30000 0x10000>;
339 reg = <0x40000 0x10000>;
345 reg = <0x50000 0x003a0000>;