treewide: convert mtd-mac-address-increment* to generic implementation
[openwrt/staging/chunkeey.git] / target / linux / lantiq / files / arch / mips / boot / dts / lantiq / vr9_tplink_vr200.dtsi
1 #include "vr9.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
5
6 / {
7 aliases {
8 led-boot = &led_power;
9 led-failsafe = &led_power;
10 led-running = &led_power;
11 led-upgrade = &led_power;
12
13 led-dsl = &led_dsl;
14 led-internet = &led_internet;
15 led-wifi = &led_wlan5g;
16 };
17
18 memory@0 {
19 device_type = "memory";
20 reg = <0x0 0x7f00000>;
21 };
22
23 keys: keys {
24 compatible = "gpio-keys-polled";
25 poll-interval = <100>;
26
27 reset {
28 label = "reset";
29 gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_RESTART>;
31 };
32
33 wifi {
34 label = "wifi";
35 gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
36 linux,code = <KEY_RFKILL>;
37 linux,input-type = <EV_SW>;
38 };
39
40 wps {
41 label = "wps";
42 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
43 linux,code = <KEY_WPS_BUTTON>;
44 };
45 };
46
47 leds: leds {
48 compatible = "gpio-leds";
49
50 led_power: power {
51 label = "blue:power";
52 gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
53 default-state = "keep";
54 };
55
56 led_dsl: dsl {
57 label = "blue:dsl";
58 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
59 };
60
61 led_internet: internet {
62 label = "blue:internet";
63 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
64 };
65
66 usb {
67 label = "blue:usb";
68 gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
69 trigger-sources = <&ehci_port1>, <&ehci_port2>;
70 linux,default-trigger = "usbport";
71 };
72
73 eth {
74 label = "blue:lan";
75 gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
76 };
77
78 wlan {
79 label = "blue:wlan";
80 gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
81 };
82
83 led_wlan5g: wifi {
84 label = "blue:wlan5g";
85 gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
86 };
87 };
88
89 usb_vbus: regulator-usb-vbus {
90 compatible = "regulator-fixed";
91
92 regulator-name = "USB_VBUS";
93
94 regulator-min-microvolt = <5000000>;
95 regulator-max-microvolt = <5000000>;
96
97 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
98 enable-active-high;
99 };
100 };
101
102 &eth0 {
103 mtd-mac-address = <&romfile 0xf100>;
104 };
105
106 &gphy0 {
107 lantiq,gphy-mode = <GPHY_MODE_GE>;
108 };
109
110 &gphy1 {
111 lantiq,gphy-mode = <GPHY_MODE_GE>;
112 };
113
114 &gpio {
115 pinctrl-names = "default";
116 pinctrl-0 = <&state_default>;
117
118 state_default: pinmux {
119 phy-rst {
120 lantiq,pins = "io42";
121 lantiq,pull = <0>;
122 lantiq,open-drain = <0>;
123 lantiq,output = <1>;
124 };
125 pcie-rst {
126 lantiq,pins = "io38";
127 lantiq,pull = <0>;
128 lantiq,output = <1>;
129 };
130 };
131 };
132
133 &gswip {
134 pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
135 pinctrl-names = "default";
136 };
137
138 &gswip_mdio {
139 phy0: ethernet-phy@0 {
140 reg = <0x0>;
141 // reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
142 };
143 phy5: ethernet-phy@5 {
144 reg = <0x5>;
145 };
146 phy11: ethernet-phy@11 {
147 reg = <0x11>;
148 };
149 phy13: ethernet-phy@13 {
150 reg = <0x13>;
151 };
152 };
153
154 &gswip_ports {
155 port@0 {
156 reg = <0>;
157 label = "lan3";
158 phy-mode = "rgmii";
159 phy-handle = <&phy0>;
160 };
161 port@2 {
162 reg = <2>;
163 label = "lan2";
164 phy-mode = "internal";
165 phy-handle = <&phy11>;
166 };
167 port@4 {
168 reg = <4>;
169 label = "lan1";
170 phy-mode = "internal";
171 phy-handle = <&phy13>;
172 };
173 port@5 {
174 reg = <5>;
175 label = "lan4";
176 phy-mode = "rgmii";
177 phy-handle = <&phy5>;
178 };
179 };
180
181 &pcie0 {
182 pcie@0 {
183 reg = <0 0 0 0 0>;
184 #interrupt-cells = <1>;
185 #size-cells = <2>;
186 #address-cells = <3>;
187 device_type = "pci";
188
189 wifi@0,0 {
190 reg = <0 0 0 0 0>;
191 mediatek,mtd-eeprom = <&radio 0x0000>;
192 big-endian;
193 ieee80211-freq-limit = <5000000 6000000>;
194 mtd-mac-address = <&romfile 0xf100>;
195 mac-address-increment = <2>;
196 };
197 };
198 };
199
200 &pci0 {
201 status = "okay";
202 gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
203 };
204
205 &spi {
206 status = "okay";
207
208 flash@4 {
209 compatible = "jedec,spi-nor";
210 reg = <4>;
211 spi-max-frequency = <33250000>;
212 m25p,fast-read;
213
214 partitions {
215 compatible = "fixed-partitions";
216 #address-cells = <1>;
217 #size-cells = <1>;
218
219 partition@0 {
220 reg = <0x0 0x20000>;
221 label = "u-boot";
222 read-only;
223 };
224
225 partition@20000 {
226 reg = <0x20000 0xf90000>;
227 label = "firmware";
228 };
229
230 partition@fb0000 {
231 reg = <0xfb0000 0x10000>;
232 label = "radioDECT";
233 read-only;
234 };
235
236 partition@fc0000 {
237 reg = <0xfc0000 0x10000>;
238 label = "config";
239 read-only;
240 };
241
242 romfile: partition@fd0000 {
243 reg = <0xfd0000 0x10000>;
244 label = "romfile";
245 read-only;
246 };
247
248 partition@fe0000 {
249 reg = <0xfe0000 0x10000>;
250 label = "rom";
251 read-only;
252 };
253
254 radio: partition@ff0000 {
255 reg = <0xff0000 0x10000>;
256 label = "radio";
257 read-only;
258 };
259 };
260 };
261 };
262
263 &usb_phy0 {
264 status = "okay";
265 };
266
267 &usb_phy1 {
268 status = "okay";
269 };
270
271 &usb0 {
272 status = "okay";
273 vbus-supply = <&usb_vbus>;
274 };
275
276 &usb1 {
277 status = "okay";
278 vbus-supply = <&usb_vbus>;
279 };