lantiq: dts: define the SPI pins in {amazonse,ar9,vr9}.dtsi
[openwrt/staging/rmilecki.git] / target / linux / lantiq / files / arch / mips / boot / dts / vr9.dtsi
1 #include <dt-bindings/gpio/gpio.h>
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "lantiq,xway", "lantiq,vr9";
7
8 aliases {
9 serial0 = &asc1;
10 };
11
12 chosen {
13 stdout-path = "serial0:115200n8";
14 };
15
16 cpus {
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 cpu@0 {
21 compatible = "mips,mips34Kc";
22 reg = <0>;
23 };
24 };
25
26 cputemp {
27 compatible = "lantiq,cputemp";
28 };
29
30 reboot {
31 compatible = "syscon-reboot";
32
33 regmap = <&rcu0>;
34 offset = <0x10>;
35 mask = <0xe0000000>;
36 };
37
38 biu@1f800000 {
39 #address-cells = <1>;
40 #size-cells = <1>;
41 compatible = "lantiq,biu", "simple-bus";
42 reg = <0x1f800000 0x800000>;
43 ranges = <0x0 0x1f800000 0x7fffff>;
44
45 icu0: icu@80200 {
46 #interrupt-cells = <1>;
47 interrupt-controller;
48 compatible = "lantiq,icu";
49 reg = <0x80200 0x28
50 0x80228 0x28
51 0x80250 0x28
52 0x80278 0x28
53 0x802a0 0x28>;
54 };
55
56 watchdog@803f0 {
57 compatible = "lantiq,xrx100-wdt", "lantiq,xrx100-wdt";
58 reg = <0x803f0 0x10>;
59
60 regmap = <&rcu0>;
61 };
62 };
63
64 sram@1f000000 {
65 #address-cells = <1>;
66 #size-cells = <1>;
67 compatible = "lantiq,sram", "simple-bus";
68 reg = <0x1f000000 0x800000>;
69 ranges = <0x0 0x1f000000 0x7fffff>;
70
71 eiu0: eiu@101000 {
72 #interrupt-cells = <1>;
73 interrupt-controller;
74 compatible = "lantiq,eiu-xway";
75 reg = <0x101000 0x1000>;
76 interrupt-parent = <&icu0>;
77 lantiq,eiu-irqs = <166 135 66 40 41 42>;
78 };
79
80 pmu0: pmu@102000 {
81 compatible = "lantiq,pmu-xway";
82 reg = <0x102000 0x1000>;
83 };
84
85 cgu0: cgu@103000 {
86 compatible = "lantiq,cgu-xway";
87 reg = <0x103000 0x1000>;
88 };
89
90 dcdc@106a00 {
91 compatible = "lantiq,dcdc-xrx200";
92 reg = <0x106a00 0x200>;
93 };
94
95 vmmc: vmmc@107000 {
96 status = "disabled";
97 compatible = "lantiq,vmmc-xway";
98 reg = <0x107000 0x300>;
99 interrupt-parent = <&icu0>;
100 interrupts = <150 151 152 153 154 155>;
101 };
102
103 rcu0: rcu@203000 {
104 #address-cells = <1>;
105 #size-cells = <1>;
106 compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
107 reg = <0x203000 0x100>;
108 ranges = <0x0 0x203000 0x100>;
109 big-endian;
110
111 gphy0: gphy@20 {
112 compatible = "lantiq,xrx200-gphy";
113 reg = <0x20 0x4>;
114
115 resets = <&reset0 31 30>, <&reset1 7 7>;
116 reset-names = "gphy", "gphy2";
117 };
118
119 gphy1: gphy@68 {
120 compatible = "lantiq,xrx200-gphy";
121 reg = <0x68 0x4>;
122
123 resets = <&reset0 29 28>, <&reset1 6 6>;
124 reset-names = "gphy", "gphy2";
125 };
126
127 reset0: reset-controller@10 {
128 compatible = "lantiq,xrx200-reset";
129 reg = <0x10 4>, <0x14 4>;
130
131 #reset-cells = <2>;
132 };
133
134 reset1: reset-controller@48 {
135 compatible = "lantiq,xrx200-reset";
136 reg = <0x48 4>, <0x24 4>;
137
138 #reset-cells = <2>;
139 };
140
141 usb_phy0: usb2-phy@18 {
142 compatible = "lantiq,xrx200-usb2-phy";
143 reg = <0x18 4>, <0x38 4>;
144 status = "disabled";
145
146 resets = <&reset1 4 4>, <&reset0 4 4>;
147 reset-names = "phy", "ctrl";
148 #phy-cells = <0>;
149 };
150
151 usb_phy1: usb2-phy@34 {
152 compatible = "lantiq,xrx200-usb2-phy";
153 reg = <0x34 4>, <0x3c 4>;
154 status = "disabled";
155
156 resets = <&reset1 5 5>, <&reset0 4 4>;
157 reset-names = "phy", "ctrl";
158 #phy-cells = <0>;
159 };
160 };
161 };
162
163 fpi@10000000 {
164 compatible = "lantiq,xrx200-fpi", "simple-bus";
165 ranges = <0x0 0x10000000 0xf000000>;
166 reg = <0x1f400000 0x1000>,
167 <0x10000000 0xf000000>;
168 regmap = <&rcu0>;
169 offset-endianness = <0x4c>;
170 #address-cells = <1>;
171 #size-cells = <1>;
172
173 localbus: localbus@0 {
174 #address-cells = <2>;
175 #size-cells = <1>;
176 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
177 1 0 0x4000000 0x4000010>; /* addsel1 */
178 compatible = "lantiq,localbus", "simple-bus";
179 };
180
181 gptu@e100a00 {
182 compatible = "lantiq,gptu-xway";
183 reg = <0xe100a00 0x100>;
184 interrupt-parent = <&icu0>;
185 interrupts = <126 127 128 129 130 131>;
186 };
187
188 usif: usif@da00000 {
189 compatible = "lantiq,usif";
190 reg = <0xda00000 0x1000000>;
191 interrupt-parent = <&icu0>;
192 interrupts = <29 125 107 108 109 110>;
193 status = "disabled";
194 };
195
196 spi: spi@e100800 {
197 compatible = "lantiq,xrx200-spi", "lantiq,xrx100-spi";
198 reg = <0xe100800 0x100>;
199 interrupt-parent = <&icu0>;
200 interrupts = <22 23 24>;
201 interrupt-names = "spi_rx", "spi_tx", "spi_err",
202 "spi_frm";
203 #address-cells = <1>;
204 #size-cells = <0>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&spi_pins>, <&spi_cs4_pins>;
207 status = "disabled";
208 };
209
210 gpio: pinmux@e100b10 {
211 compatible = "lantiq,xrx200-pinctrl";
212 #gpio-cells = <2>;
213 gpio-controller;
214 reg = <0xe100b10 0xa0>;
215
216 mdio_pins: mdio {
217 mux {
218 lantiq,groups = "mdio";
219 lantiq,function = "mdio";
220 };
221 };
222
223 spi_pins: spi {
224 mux-0 {
225 lantiq,groups = "spi_di";
226 lantiq,function = "spi";
227 };
228 mux-1 {
229 lantiq,groups = "spi_do", "spi_clk";
230 lantiq,function = "spi";
231 lantiq,output = <1>;
232 };
233 };
234
235 spi_cs4_pins: spi-cs4 {
236 mux {
237 lantiq,groups = "spi_cs4";
238 lantiq,function = "spi";
239 lantiq,output = <1>;
240 };
241 };
242 };
243
244 stp: stp@e100bb0 {
245 status = "disabled";
246 compatible = "lantiq,gpio-stp-xway";
247 reg = <0xe100bb0 0x40>;
248 #gpio-cells = <2>;
249 gpio-controller;
250
251 lantiq,shadow = <0xffffff>;
252 lantiq,groups = <0x7>;
253 lantiq,dsl = <0x0>;
254 lantiq,phy1 = <0x0>;
255 lantiq,phy2 = <0x0>;
256 };
257
258 asc1: serial@e100c00 {
259 compatible = "lantiq,asc";
260 reg = <0xe100c00 0x400>;
261 interrupt-parent = <&icu0>;
262 interrupts = <112 113 114>;
263 };
264
265 deu@e103100 {
266 compatible = "lantiq,deu-xrx200";
267 reg = <0xe103100 0xf00>;
268 };
269
270 dma0: dma@e104100 {
271 compatible = "lantiq,dma-xway";
272 reg = <0xe104100 0x800>;
273 };
274
275 ebu0: ebu@e105300 {
276 compatible = "lantiq,ebu-xway";
277 reg = <0xe105300 0x100>;
278 };
279
280 usb0: usb@e101000 {
281 status = "disabled";
282 compatible = "lantiq,xrx200-usb";
283 reg = <0xe101000 0x1000
284 0xe120000 0x3f000>;
285 interrupt-parent = <&icu0>;
286 interrupts = <62 91>;
287 dr_mode = "host";
288 phys = <&usb_phy0>;
289 phy-names = "usb2-phy";
290 };
291
292 usb1: usb@e106000 {
293 status = "disabled";
294 compatible = "lantiq,xrx200-usb";
295 reg = <0xe106000 0x1000>;
296 interrupt-parent = <&icu0>;
297 interrupts = <91>;
298 dr_mode = "host";
299 phys = <&usb_phy1>;
300 phy-names = "usb2-phy";
301 };
302
303 eth0: eth@e108000 {
304 #address-cells = <1>;
305 #size-cells = <0>;
306 compatible = "lantiq,xrx200-net";
307 reg = < 0xe108000 0x3000 /* switch */
308 0xe10b100 0x70 /* mdio */
309 0xe10b1d8 0x30 /* mii */
310 0xe10b308 0x30 /* pmac */
311 >;
312 interrupt-parent = <&icu0>;
313 interrupts = <75 73 72>;
314 resets = <&reset0 21 16>, <&reset0 8 8>;
315 reset-names = "switch", "ppe";
316 lantiq,phys = <&gphy0>, <&gphy1>;
317 pinctrl-0 = <&mdio_pins>;
318 pinctrl-names = "default";
319 };
320
321 mei@e116000 {
322 compatible = "lantiq,mei-xrx200";
323 reg = <0xe116000 0x9c>;
324 interrupt-parent = <&icu0>;
325 interrupts = <63>;
326 };
327
328 ppe@e234000 {
329 compatible = "lantiq,ppe-xrx200";
330 reg = <0xe234000 0x3ffd>;
331 interrupt-parent = <&icu0>;
332 interrupts = <96>;
333 resets = <&reset0 3 3>, <&reset0 11 11>, <&reset0 23 23>;
334 reset-names = "dsp", "dfe", "tc";
335 };
336
337 pcie0: pcie@d900000 {
338 compatible = "lantiq,pcie-xrx200";
339
340 #interrupt-cells = <1>;
341 #size-cells = <2>;
342 #address-cells = <3>;
343
344 reg = <0xd900000 0x1000>;
345
346 interrupt-parent = <&icu0>;
347 interrupts = <161 144>;
348
349 device_type = "pci";
350
351 gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
352 };
353
354 pci0: pci@e105400 {
355 status = "disabled";
356
357 #address-cells = <3>;
358 #size-cells = <2>;
359 #interrupt-cells = <1>;
360 compatible = "lantiq,pci-xway";
361 bus-range = <0x0 0x0>;
362 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
363 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
364 reg = <0x7000000 0x8000 /* config space */
365 0xe105400 0x400>; /* pci bridge */
366 lantiq,bus-clock = <33333333>;
367 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
368 interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
369 req-mask = <0x1>; /* GNT1 */
370 };
371 };
372
373 vdsl {
374 compatible = "lantiq,vdsl-vrx200";
375 };
376 };