target/linux/lantiq/files/arch/mips/lantiq/falcon/devices.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify it
   3  * under the terms of the GNU General Public License version 2 as published
   4  * by the Free Software Foundation.
   5  *
   6  * Copyright (C) 2011 Thomas Langer <thomas.langer@lantiq.com>
   7  * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
   8  */
   9
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/nand.h>
  12 #include <linux/gpio.h>
  13
  14 #include <lantiq_soc.h>
  15
  16 #include "devices.h"
  17
  18 /* nand flash */
  19 /* address lines used for NAND control signals */
  20 #define NAND_ADDR_ALE           0x10000
  21 #define NAND_ADDR_CLE           0x20000
  22 /* Ready/Busy Status */
  23 #define MODCON_STS              0x0002
  24 /* Ready/Busy Status Edge */
  25 #define MODCON_STSEDGE          0x0004
  26
  27 static const char *part_probes[] = { "cmdlinepart", NULL };
  28
  29 static int
  30 falcon_nand_ready(struct mtd_info *mtd)
  31 {
  32         u32 modcon = ltq_ebu_r32(LTQ_EBU_MODCON);
  33
  34         return (((modcon & (MODCON_STS | MODCON_STSEDGE)) ==
  35                                                 (MODCON_STS | MODCON_STSEDGE)));
  36 }
  37
  38 static void
  39 falcon_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  40 {
  41         struct nand_chip *this = mtd->priv;
  42         unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
  43
  44         if (ctrl & NAND_CTRL_CHANGE) {
  45                 nandaddr &= ~(NAND_ADDR_ALE | NAND_ADDR_CLE);
  46
  47                 if (ctrl & NAND_CLE)
  48                         nandaddr |= NAND_ADDR_CLE;
  49                 if (ctrl & NAND_ALE)
  50                         nandaddr |= NAND_ADDR_ALE;
  51
  52                 this->IO_ADDR_W = (void __iomem *) nandaddr;
  53         }
  54
  55         if (cmd != NAND_CMD_NONE)
  56                 writeb(cmd, this->IO_ADDR_W);
  57 }
  58
  59 static struct platform_nand_data falcon_flash_nand_data = {
  60         .chip = {
  61                 .nr_chips               = 1,
  62                 .chip_delay             = 25,
  63                 .part_probe_types       = part_probes,
  64         },
  65         .ctrl = {
  66                 .cmd_ctrl               = falcon_hwcontrol,
  67                 .dev_ready              = falcon_nand_ready,
  68         }
  69 };
  70
  71 static struct resource ltq_nand_res =
  72         MEM_RES("nand", LTQ_FLASH_START, LTQ_FLASH_MAX);
  73
  74 static struct platform_device ltq_flash_nand = {
  75         .name           = "gen_nand",
  76         .id             = -1,
  77         .num_resources  = 1,
  78         .resource       = &ltq_nand_res,
  79         .dev            = {
  80                 .platform_data = &falcon_flash_nand_data,
  81         },
  82 };
  83
  84 void __init
  85 falcon_register_nand(void)
  86 {
  87         platform_device_register(&ltq_flash_nand);
  88 }
  89
  90 /* gpio */
  91 #define DECLARE_GPIO_RES(port) \
  92 static struct resource falcon_gpio ## port ## _res[] = { \
  93         MEM_RES("gpio"#port, LTQ_GPIO ## port ## _BASE_ADDR, \
  94                 LTQ_GPIO ## port ## _SIZE), \
  95         MEM_RES("padctrl"#port, LTQ_PADCTRL ## port ## _BASE_ADDR, \
  96                 LTQ_PADCTRL ## port ## _SIZE), \
  97         IRQ_RES("gpio_mux"#port, FALCON_IRQ_GPIO_P ## port) \
  98 }
  99 DECLARE_GPIO_RES(0);
 100 DECLARE_GPIO_RES(1);
 101 DECLARE_GPIO_RES(2);
 102 DECLARE_GPIO_RES(3);
 103 DECLARE_GPIO_RES(4);
 104
 105 void __init
 106 falcon_register_gpio(void)
 107 {
 108         platform_device_register_simple("falcon_gpio", 0,
 109                 falcon_gpio0_res, ARRAY_SIZE(falcon_gpio0_res));
 110         platform_device_register_simple("falcon_gpio", 1,
 111                 falcon_gpio1_res, ARRAY_SIZE(falcon_gpio1_res));
 112         platform_device_register_simple("falcon_gpio", 2,
 113                 falcon_gpio2_res, ARRAY_SIZE(falcon_gpio2_res));
 114 }
 115
 116 void __init
 117 falcon_register_gpio_extra(void)
 118 {
 119         platform_device_register_simple("falcon_gpio", 3,
 120                 falcon_gpio3_res, ARRAY_SIZE(falcon_gpio3_res));
 121         platform_device_register_simple("falcon_gpio", 4,
 122                 falcon_gpio4_res, ARRAY_SIZE(falcon_gpio4_res));
 123 }
 124
 125 /* spi flash */
 126 static struct platform_device ltq_spi = {
 127         .name                   = "falcon_spi",
 128         .num_resources          = 0,
 129 };
 130
 131 void __init
 132 falcon_register_spi_flash(struct spi_board_info *data)
 133 {
 134         spi_register_board_info(data, 1);
 135         platform_device_register(&ltq_spi);
 136 }
 137
 138 /* i2c */
 139 static struct resource falcon_i2c_resources[] = {
 140         MEM_RES("i2c", GPON_I2C_BASE, GPON_I2C_SIZE),
 141         IRQ_RES(i2c_lb, FALCON_IRQ_I2C_LBREQ),
 142         IRQ_RES(i2c_b, FALCON_IRQ_I2C_BREQ),
 143         IRQ_RES(i2c_err, FALCON_IRQ_I2C_I2C_ERR),
 144         IRQ_RES(i2c_p, FALCON_IRQ_I2C_I2C_P),
 145 };
 146
 147 void __init
 148 falcon_register_i2c(void)
 149 {
 150         platform_device_register_simple("i2c-falcon", 0,
 151                 falcon_i2c_resources, ARRAY_SIZE(falcon_i2c_resources));
 152 }