4a14df509fc5f7adfe5be3f2f10f74ab83b1d855
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
7 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/time.h>
16 #include <asm/div64.h>
18 #include <lantiq_soc.h>
22 #include <status_reg.h>
24 static struct svip_reg_status
*const status
=
25 (struct svip_reg_status
*)LTQ_STATUS_BASE
;
26 static struct svip_reg_sys0
*const sys0
= (struct svip_reg_sys0
*)LTQ_SYS0_BASE
;
27 static struct svip_reg_sys1
*const sys1
= (struct svip_reg_sys1
*)LTQ_SYS1_BASE
;
29 unsigned int ltq_svip_io_region_clock(void)
31 return 200000000; /* 200 MHz */
33 EXPORT_SYMBOL(ltq_svip_io_region_clock
);
35 unsigned int ltq_svip_cpu_hz(void)
37 /* Magic BootROM speed location... */
38 if ((*(u32
*)0x9fc07ff0) == 1)
39 return *(u32
*)0x9fc07ff4;
41 if (STATUS_CONFIG_CLK_MODE_GET(status_r32(config
)) == 1) {
45 switch (SYS0_PLL1CR_PLLDIV_GET(sys0_r32(pll1cr
))) {
57 EXPORT_SYMBOL(ltq_svip_cpu_hz
);
59 unsigned int ltq_svip_fpi_hz(void)
61 u32 fbs0_div
[2] = {4, 8};
64 div
= SYS1_FPICR_FPIDIV_GET(sys1_r32(fpicr
));
65 return ltq_svip_cpu_hz()/fbs0_div
[div
];
67 EXPORT_SYMBOL(ltq_svip_fpi_hz
);
69 unsigned int ltq_get_ppl_hz(void)
71 /* Magic BootROM speed location... */
72 if ((*(u32
*)0x9fc07ff0) == 1)
73 return *(u32
*)0x9fc07ff4;
75 if (STATUS_CONFIG_CLK_MODE_GET(status_r32(config
)) == 1) {
79 switch (SYS0_PLL1CR_PLLDIV_GET(sys0_r32(pll1cr
))) {
92 unsigned int ltq_get_fbs0_hz(void)
94 u32 fbs0_div
[2] = {4, 8};
97 div
= SYS1_FPICR_FPIDIV_GET(sys1_r32(fpicr
));
98 return ltq_get_ppl_hz()/fbs0_div
[div
];
100 EXPORT_SYMBOL(ltq_get_fbs0_hz
);