target/linux/lantiq/files/drivers/usb/dwc_otg/dwc_otg_plat.h

   1 /* ==========================================================================
   2  * $File: //dwh/usb_iip/dev/software/otg_ipmate/linux/platform/dwc_otg_plat.h $
   3  * $Revision: 1.1.1.1 $
   4  * $Date: 2009-04-17 06:15:34 $
   5  * $Change: 510301 $
   6  *
   7  * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
   8  * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
   9  * otherwise expressly agreed to in writing between Synopsys and you.
  10  *
  11  * The Software IS NOT an item of Licensed Software or Licensed Product under
  12  * any End User Software License Agreement or Agreement for Licensed Product
  13  * with Synopsys or any supplement thereto. You are permitted to use and
  14  * redistribute this Software in source and binary forms, with or without
  15  * modification, provided that redistributions of source code must retain this
  16  * notice. You may not view, use, disclose, copy or distribute this file or
  17  * any information contained herein except pursuant to this license grant from
  18  * Synopsys. If you do not agree with this notice, including the disclaimer
  19  * below, then you are not authorized to use the Software.
  20  *
  21  * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
  25  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  27  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  28  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
  31  * DAMAGE.
  32  * ========================================================================== */
  33
  34 #if !defined(__DWC_OTG_PLAT_H__)
  35 #define __DWC_OTG_PLAT_H__
  36
  37 #include <linux/types.h>
  38 #include <linux/slab.h>
  39 #include <linux/list.h>
  40 #include <linux/delay.h>
  41 #include <asm/io.h>
  42
  43 /**
  44  * @file
  45  *
  46  * This file contains the Platform Specific constants, interfaces
  47  * (functions and macros) for Linux.
  48  *
  49  */
  50 /*#if !defined(__LINUX__)
  51 #error "The contents of this file is Linux specific!!!"
  52 #endif
  53 */
  54 #include <lantiq_soc.h>
  55 #define writel ltq_w32
  56 #define readl ltq_r32
  57
  58 /**
  59  * Reads the content of a register.
  60  *
  61  * @param _reg address of register to read.
  62  * @return contents of the register.
  63  *
  64
  65  * Usage:<br>
  66  * <code>uint32_t dev_ctl = dwc_read_reg32(&dev_regs->dctl);</code>
  67  */
  68 static __inline__ uint32_t dwc_read_reg32( volatile uint32_t *_reg)
  69 {
  70         return readl(_reg);
  71 };
  72
  73 /**
  74  * Writes a register with a 32 bit value.
  75  *
  76  * @param _reg address of register to read.
  77  * @param _value to write to _reg.
  78  *
  79  * Usage:<br>
  80  * <code>dwc_write_reg32(&dev_regs->dctl, 0); </code>
  81  */
  82 static __inline__ void dwc_write_reg32( volatile uint32_t *_reg, const uint32_t _value)
  83 {
  84         writel( _value, _reg );
  85 };
  86
  87 /**
  88  * This function modifies bit values in a register.  Using the
  89  * algorithm: (reg_contents & ~clear_mask) | set_mask.
  90  *
  91  * @param _reg address of register to read.
  92  * @param _clear_mask bit mask to be cleared.
  93  * @param _set_mask bit mask to be set.
  94  *
  95  * Usage:<br>
  96  * <code> // Clear the SOF Interrupt Mask bit and <br>
  97  * // set the OTG Interrupt mask bit, leaving all others as they were.
  98  *    dwc_modify_reg32(&dev_regs->gintmsk, DWC_SOF_INT, DWC_OTG_INT);</code>
  99  */
 100 static __inline__
 101  void dwc_modify_reg32( volatile uint32_t *_reg, const uint32_t _clear_mask, const uint32_t _set_mask)
 102 {
 103         writel( (readl(_reg) & ~_clear_mask) | _set_mask, _reg );
 104 };
 105
 106
 107 /**
 108  * Wrapper for the OS micro-second delay function.
 109  * @param[in] _usecs Microseconds of delay
 110  */
 111 static __inline__ void UDELAY( const uint32_t _usecs )
 112 {
 113         udelay( _usecs );
 114 }
 115
 116 /**
 117  * Wrapper for the OS milli-second delay function.
 118  * @param[in] _msecs milliseconds of delay
 119  */
 120 static __inline__ void MDELAY( const uint32_t _msecs )
 121 {
 122         mdelay( _msecs );
 123 }
 124
 125 /**
 126  * Wrapper for the Linux spin_lock.  On the ARM (Integrator)
 127  * spin_lock() is a nop.
 128  *
 129  * @param _lock Pointer to the spinlock.
 130  */
 131 static __inline__ void SPIN_LOCK( spinlock_t *_lock )
 132 {
 133         spin_lock(_lock);
 134 }
 135
 136 /**
 137  * Wrapper for the Linux spin_unlock.  On the ARM (Integrator)
 138  * spin_lock() is a nop.
 139  *
 140  * @param _lock Pointer to the spinlock.
 141  */
 142 static __inline__ void SPIN_UNLOCK( spinlock_t *_lock )
 143 {
 144         spin_unlock(_lock);
 145 }
 146
 147 /**
 148  * Wrapper (macro) for the Linux spin_lock_irqsave.  On the ARM
 149  * (Integrator) spin_lock() is a nop.
 150  *
 151  * @param _l Pointer to the spinlock.
 152  * @param _f unsigned long for irq flags storage.
 153  */
 154 #define SPIN_LOCK_IRQSAVE( _l, _f )  { \
 155         spin_lock_irqsave(_l,_f); \
 156         }
 157
 158 /**
 159  * Wrapper (macro) for the Linux spin_unlock_irqrestore.  On the ARM
 160  * (Integrator) spin_lock() is a nop.
 161  *
 162  * @param _l Pointer to the spinlock.
 163  * @param _f unsigned long for irq flags storage.
 164  */
 165 #define SPIN_UNLOCK_IRQRESTORE( _l,_f ) {\
 166         spin_unlock_irqrestore(_l,_f);  \
 167         }
 168
 169
 170 /*
 171  * Debugging support vanishes in non-debug builds.
 172  */
 173
 174
 175 /**
 176  * The Debug Level bit-mask variable.
 177  */
 178 extern uint32_t g_dbg_lvl;
 179 /**
 180  * Set the Debug Level variable.
 181  */
 182 static inline uint32_t SET_DEBUG_LEVEL( const uint32_t _new )
 183 {
 184         uint32_t old = g_dbg_lvl;
 185         g_dbg_lvl = _new;
 186         return old;
 187 }
 188
 189 /** When debug level has the DBG_CIL bit set, display CIL Debug messages. */
 190 #define DBG_CIL         (0x2)
 191 /** When debug level has the DBG_CILV bit set, display CIL Verbose debug
 192  * messages */
 193 #define DBG_CILV        (0x20)
 194 /**  When debug level has the DBG_PCD bit set, display PCD (Device) debug
 195  *  messages */
 196 #define DBG_PCD         (0x4)
 197 /** When debug level has the DBG_PCDV set, display PCD (Device) Verbose debug
 198  * messages */
 199 #define DBG_PCDV        (0x40)
 200 /** When debug level has the DBG_HCD bit set, display Host debug messages */
 201 #define DBG_HCD         (0x8)
 202 /** When debug level has the DBG_HCDV bit set, display Verbose Host debug
 203  * messages */
 204 #define DBG_HCDV        (0x80)
 205 /** When debug level has the DBG_HCD_URB bit set, display enqueued URBs in host
 206  *  mode. */
 207 #define DBG_HCD_URB     (0x800)
 208
 209 /** When debug level has any bit set, display debug messages */
 210 #define DBG_ANY         (0xFF)
 211
 212 /** All debug messages off */
 213 #define DBG_OFF         0
 214
 215 /** Prefix string for DWC_DEBUG print macros. */
 216 #define USB_DWC "DWC_otg: "
 217
 218 /**
 219  * Print a debug message when the Global debug level variable contains
 220  * the bit defined in <code>lvl</code>.
 221  *
 222  * @param[in] lvl - Debug level, use one of the DBG_ constants above.
 223  * @param[in] x - like printf
 224  *
 225  *    Example:<p>
 226  * <code>
 227  *      DWC_DEBUGPL( DBG_ANY, "%s(%p)\n", __func__, _reg_base_addr);
 228  * </code>
 229  * <br>
 230  * results in:<br>
 231  * <code>
 232  * usb-DWC_otg: dwc_otg_cil_init(ca867000)
 233  * </code>
 234  */
 235 #ifdef DEBUG
 236
 237 # define DWC_DEBUGPL(lvl, x...) do{ if ((lvl)&g_dbg_lvl)printk( KERN_DEBUG USB_DWC x ); }while(0)
 238 # define DWC_DEBUGP(x...)       DWC_DEBUGPL(DBG_ANY, x )
 239
 240 # define CHK_DEBUG_LEVEL(level) ((level) & g_dbg_lvl)
 241
 242 #else
 243
 244 # define DWC_DEBUGPL(lvl, x...) do{}while(0)
 245 # define DWC_DEBUGP(x...)
 246
 247 # define CHK_DEBUG_LEVEL(level) (0)
 248
 249 #endif /*DEBUG*/
 250
 251 /**
 252  * Print an Error message.
 253  */
 254 #define DWC_ERROR(x...) printk( KERN_ERR USB_DWC x )
 255 /**
 256  * Print a Warning message.
 257  */
 258 #define DWC_WARN(x...) printk( KERN_WARNING USB_DWC x )
 259 /**
 260  * Print a notice (normal but significant message).
 261  */
 262 #define DWC_NOTICE(x...) printk( KERN_NOTICE USB_DWC x )
 263 /**
 264  *  Basic message printing.
 265  */
 266 #define DWC_PRINT(x...) printk( KERN_INFO USB_DWC x )
 267
 268 #endif
 269